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EM84502AP 데이터시트 PDF




ELAN Microelectronics Corp에서 제조한 전자 부품 EM84502AP은 전자 산업 및 응용 분야에서
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부품번호 EM84502AP 기능
기능 PS/2 MOUSE ENCODER
제조업체 ELAN Microelectronics Corp
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EM84502AP 데이터시트, 핀배열, 회로
EMEM884455002
PS/2 PMS/O2 UMSOEUSCEOCNOTNRTROOLLLLEERR
GENERAL DESCRIPTION
The EM84502 Mouse Controller is specially designed to control PS/2 mouse device.This single chip can
interface three key-switches and four photo-couples direct to 8042. EM84502 can receive command and echo
status or data format which are compatible with IBM PS/2 mode mouse. Key debouncing circuit is provided
to prevent false entry and improve the accuracy.
In the conventional mouse, a great number of noises are generated when the grid is partially closed or opened.
These noise are usually mistaken for movement signals by conventional mouse controller and the cursor of the
dispaly screen is thus moved frequently up and down or back and forth. This will consumes a great amount of
energy.The EM84502 PS/2 mouse controller provides noise immunity circuits to eliminate these noise
in order to reduce energy consumption.
FEATURES
• Being compatiable with PS/2 mouse mode.
• Built-in noise immunity circuit.
• Low power dissipation.
• RC oscillation.
• Three key-switches and four photo-couples inputs.
• Both key-press and key-release debounce interval 12 ms.
• Through three key-switches input, EM84502 can exert seven different output.
• The motion detector of the EM84502 could sense 8 m/sec maximun with 200 DPI wheels.
APPLICATIONS
• Optical mouse or pen-mouse.
• Mechanical mouse or pen-mouse.
• Optomechanical mouse or pen-mouse.
• Mechanical track ball.
• Optomechanical track ball.
PIN ASSIGNMENT
EM84502AP
VDD
OP
OSC.OUT
CLK
DATA
VSS
R
1
2
3
4
5
6
7
14 OSCR
13 Y2
12 Y1
11 X2
10 X1
9L
8M
EM84502BP
VDD
OP
NC
NC
OSC.OUT
CLK
DATA
VSS
1
2
3
4
5
6
7
8
16 OSCR
15 Y2
14 Y1
13 X2
12 X1
11 L
10 M
9R
EM84502AM
VDD
OP
OSC.OUT
CLK
DATA
VSS
R
1
2
3
4
5
6
7
14 OSCR
13 Y2
12 Y1
11 X2
10 X1
9L
8M
EM84502BM*
VDD
OP
NC
NC
OSC.OUT
CLK
DATA
VSS
1
2
3
4
5
6
7
8
16 OSCR
15 Y2
14 Y1
13 X2
12 X1
11 L
10 M
9R
* This specification are subject to be changed without notice.
* (Under developed)
6.18.1998 1




EM84502AP pdf, 반도체, 판매, 대치품
EM84502
PS/2 MOUSE CONTROLLER
Bit Function
1 Start bit ( always 0 )
2-9 Data bits ( D0 - D7 )
10 Parity bit ( odd parity )
11 Stop bit ( always 1 )
iv). Data Output ( data from EM84502 to system ):
If CLK is low ( inhibit status ) , data is no transmission.
If CLK is high and DATA is low ( request-to-send ), data is updated. Data is received from the system
and no transmission are started by EM84502 until CLK and DATA both high. If CLK and DATA are both
high, the transmission is ready. DATA is valid prior to the falling edge of CLK and beyond the rising edge
of CLK. During transmission, EM84502 check for line contention by checking for an inactive level on CLK
at intervals not to exceed 100u sec. Contention occurs when the system lowers CLK to inhibit EM84502
output after EM84502 has started a transmission. If this occurs before the rising edge of the tenth clock,
EM84502 internal store its data in its buffer and returns DATA and CLK to an active level. If the contention
does not occur by the tenth clock, the transmission is complete.
Following a transmission, the system inhibits EM84502 by holding CLK low until it can service the input
or until the system receives a request to send a response from EM84502.
v). Data Input ( from system to EM84502 ):
System first check if EM84502 is transmitting data. If EM84502 is transmitting, the system can override
the output forcing CLK to an inactive level prior to the tenth clock. If EM84502 transmission is beyond
the tenth clock, the system receives the data. If EM84502 is not transmitting or if the system choose to
override the output, the system force CLK to an inactive level for a period of not less than 100µ sec while
preparing for output. When the system is ready to output start bit (0), it allows CLK go to active level. If
request-to-send is detected, EM84502 clocks 11 bits. Following the tenth clock EM84502 checks for
an active level on the DATA line, and if found, force DATA low , and clock once more. If occurs framing
error, EM84502 continue to clock until DATA is high, then clocks the line control bit and request a
Resend. When the system sends out a command or data transmission that requires a response, the system
waits for EM84502 to response before sending its next output.
D). PS/2 Mouse Error Handling:
i). A Resend command ( FE ) following receipt of an invalid input or any input with incorrect parity.
ii). If two invalid input are received in succession, an error code of hex FC send to the system.
iii). The counter accumulators are cleared after receiving any command except “Resend”.
iv). EM84501 receives a Resend command ( FE ), it transmit its last packet of data.
v). In the stream mode “Resend” is received by EM84502 following a 3-byte data packet transmission
to the system. EM84502 resend the 3-byte data packet prior to clearing the counter.
vi). A response is sent within 25 ms if
* This specification are subject to be changed without notice.
6.18.1998 4

4페이지










EM84502AP 전자부품, 판매, 대치품
EM84502
PS/2 MOUSE CONTROLLER
3
4
5
6
7
2 0-7
3 0-7
Reserved
0 = Normal speed, 1 = Autospeed
0 = Disabled, 1 = Enabled
0 = Stream mode, 1 = Remote mode
Reserved
Current resolution setting ( D0 - D7 )
Current sampling rate ( D0 - D7 )
n). Set Resolution ( E8,XX )
EM84502 provides four resolutions selected by the second byte of this command as follows:
Second Byte XX
00
01
02
03
Resolution
8 dot/count
4 dot/count
2 dot/count
1 dot/count
o). Set Autospeed ( E7 )
At the end of a sample interval in the stream mode, the current X and Y data values are converted new values.
The sign bits are not involved in this conversion. The conversion is only in stream mode. The relationship
between the input and output count follows:
Input
0
1
2
3
4
5
N(6 )
Ouput
0
1
1
3
6
9
2.0*N
p). Reset Autospeed ( E6 )
This command restore normal speed.
F) Testing mode
Whenever OPT is connected to OSC OUT, the chip will enter buyer's testing mode. The X direction output
signals of comparators will present to L and M pin. Pressing "R" key can toggle the output from X direction
to Y direction.
ABSOLUTE MAXIMUM RATINGS
Parameter
Temperature under bias
Storage temperature range
Input voltage
Output voltage
Sym.
T
OPR
TSTR
VIN
VO
* This specification are subject to be changed without notice.
Ratings
0~70
-65~150
-0.3~6.0
-0.3~6.0
Unit
°C
°C
V
V
6.18.1998 7

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관련 데이터시트

부품번호상세설명 및 기능제조사
EM84502AM

PS/2 MOUSE ENCODER

ELAN Microelectronics Corp
ELAN Microelectronics Corp
EM84502AP

PS/2 MOUSE ENCODER

ELAN Microelectronics Corp
ELAN Microelectronics Corp

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