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Número de pieza | DSV14196 | |
Descripción | +3.3V Supply EIA/TIA-232 5 Driver x 3 Receiver | |
Fabricantes | National Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de DSV14196 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! April 1999
DSV14196
+3.3V Supply EIA/TIA-232 5 Driver x 3 Receiver
General Description
The DSV14196/DSV14196T is a five driver, three receiver
device which conforms to the EIA/TIA-232-E and the ITU-T
V.28 standards.
The flow-through pinout facilitates simple non-crossover
board layout. The DSV14196/DSV14196T provides a pe-
ripheral side one-chip solution for the common 9-pin serial
RS-232 interface between data terminals and data commu-
nications equipment.
Features
n Conforms to EIA/TIA-232-E and ITU-T V.28
n 5 drivers and 3 receivers
n Flow-through pinout
n Failsafe receiver outputs high when inputs open
n 20-pin wide SOIC package
n LapLink® compatible — 230.4 kbps data rate
n +3.3V Logic Interface
n Commercial temperature range option DSV14196
(0˚C to 70˚C)
n Industrial temperature range option DSV14196T
(−40˚C to +85˚C)
Connection Diagram
SOP
Functional Diagram
DS100853-1
Order Number DSV14196WM,DSV14196TWM
See NS Package Number M20B
DS100853-2
LapLink® is a registered trademark of Travelling Software.
© 1999 National Semiconductor Corporation DS100853
www.national.com
1 page Switching Characteristics (Note 3) (Note 5) (Note 6)
DSV14196 & DSV14196T
TA = +25˚C
Symbol
Parameter
Conditions
Min Typ Max Units
DRIVER CHARACTERISTICS
tPHL Propagation Delay High to Low
tPLH Propagation Delay Low to High
tr, tf Rise/Fall Time (Note 8)
RECEIVER CHARACTERISTICS
RL = 3 kΩ, CL = 50 pF
(Figures 1, 2)
60 350
240 350
40
ns
ns
ns
tPHL Propagation Delay High to Low
tPLH Propagation Delay Low to High
tr Rise Time
tf Fall Time
RL = 1.5 kΩ, CL = 15 pF
(includes fixture plus probe),
(Figures 3, 4)
150 350
240 350
40 175
40 100
ns
ns
ns
ns
Note 1: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of Electrical Characteristics specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of the device pins is defined as negative. All voltages are referenced to ground unless otherwise
specified. For current, minimum and maximum values are specified as an absolute value and the sign is used to indicate direction. For voltage logic levels, the more
positive value is designated as maximum. For example, if −6V is a maximum, the typical value −6.8V is more negative.
Note 3: All typicals are given for: VCC = +3.3V, V+ = +12V, V− = −12V, TA = +25˚C.
Note 4: Only one driver output shorted at a time.
Note 5: Generator characteristics for driver input: f = 64 kHz (128 kbps), tr = tf < 10 ns, VIH = 3V, VIL = 0V, duty cycle = 50%.
Note 6: Generator characteristics for receiver input: f = 64 kHz (128 kbps), tr = tf = 200 ns, VIH = 3V, VIL = −3V, duty cycle = 50%.
Note 7: If receiver inputs are unconnected, receiver output is a logic high.
Note 8: Refer to typical curves. Driver output slew rate is measured from the +3V to the −3V level on the output waveform. Inputs not under test are connected to
VCC or GND. Slew rate is determined by load capacitance. To comply with a 30 V/µs maximum slew rate, a minimum load capacitance of 390 pF for DSV14196 or
620 pF for DSV14196T is recommended.
5 www.national.com
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet DSV14196.PDF ] |
Número de pieza | Descripción | Fabricantes |
DSV14196 | +3.3V Supply EIA/TIA-232 5 Driver x 3 Receiver | National Semiconductor |
DSV14196 | DSV14196 +3.3V Supply EIA/TIA-232 5 Driver x 3 Receiver (Rev. D) | Texas Instruments |
DSV14196TWM | +3.3V Supply EIA/TIA-232 5 Driver x 3 Receiver | National Semiconductor |
DSV14196WM | +3.3V Supply EIA/TIA-232 5 Driver x 3 Receiver | National Semiconductor |
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