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부품번호 74ACTQ464ASPC 기능
기능 Quiet Series Octal Transceiver/Register with 3-STATE Outputs
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74ACTQ464ASPC 데이터시트, 핀배열, 회로
January 1990
Revised September 2000
74ACQ646 74ACTQ646
Quiet SeriesOctal Transceiver/Register
with 3-STATE Outputs
General Description
The ACQ/ACTQ646 consist of registered bus transceiver
circuits, with outputs, D-type flip-flops, and control circuitry
providing multiplexed transmission of data directly from the
input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on
the LOW-to-HIGH transition of the appropriate clock pin
(CPAB or CPBA). The four fundamental handling functions
available are illustrated in Figure 1, Figure 2, Figure 3 and
Figure 4.
The ACQ/ACTQ utilizes Fairchild Quiet Seriestechnol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Seriesfea-
tures GTOoutput control and undershoot corrector in
addition to a split ground bus for superior performance.
Features
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s Independent registers for A and B busses
s Multiplexed real-time and stored data transfers
s 300 mil slim dual-in-line package
s Outputs source/sink 24 mA
s Faster prop delays than the standard AC/ACT646
Ordering Code:
Order Number Package Number
Package Description
74ACQ646SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACQ464ASPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74ACTQ646SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74ACTQ464ASPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A0A7
B0B7
CPAB, CPBA
SAB, SBA
G
DIR
Descriptions
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
FACT, Quiet Series, FACT Quiet Seriesand GTOare trademarks of Fairchild Semiconductor Corporation
© 2000 Fairchild Semiconductor Corporation DS010635
www.fairchildsemi.com




74ACTQ464ASPC pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
DC Latch-Up Source
or Sink Current
Junction Temperature (TJ)
PDIP
0.5V to +7.0V
20 mA
+20 mA
0.5V to VCC + 0.5V
20 mA
+20 mA
0.5V to VCC + 0.5V
±50 mA
±50 mA
65°C to +150°C
±300 mA
140°C
Recommended Operating
Conditions
Supply Voltage (VCC)
ACQ
2.0V to 6.0V
ACTQ
4.5V to 5.5V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate V/t
0V to VCC
0V to VCC
40°C to +85°C
ACQ Devices
VIN from 30% to 70% of VCC
VCC @ 3.0V, 4.5V, 5.5V
Minimum Input Edge Rate V/t
125 mV/ns
ACTQ Devices
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
125 mV/ns
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACTcircuits outside databook specifications.
DC Electrical Characteristics for ACQ
Symbol
Parameter
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
VCC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
VOL Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
IIN (Note 5)
IOLD
IOHD
ICC
(Note 5)
Maximum Input Leakage Current
Minimum Dynamic
Output Current (Note 4)
Maximum Quiescent
Supply Current
IOZT
Maximum I/O
Leakage Current
VOLP
(An, Bn Inputs)
Quiet Output
Maximum Dynamic VOL
3.0
4.5
5.5
5.5
5.5
5.5
5.5
5.5
5.0
TA = +25°C
TA = −40°C to +85°C
Typ Guaranteed Limits
1.5 2.1
2.1
2.25
3.15
3.15
2.75
3.85
3.85
1.5 0.9
0.9
2.25
1.35
1.35
2.75
1.65
1.65
2.99
2.9
2.9
4.49
4.4
4.4
5.49
5.4
5.4
0.002
0.001
0.001
2.56
3.86
4.85
0.1
0.1
0.1
2.46
3.76
4.76
0.1
0.1
0.1
0.36
0.36
0.36
± 0.1
8.0
0.44
0.44
0.44
± 1.0
75
75
80.0
±0.6
±6.0
1.1 1.5
Units
Conditions
VOUT = 0.1V
V or VCC 0.1V
VOUT = 0.1V
V or VCC 0.1V
V IOUT = −50 µA
VIN = VIL or VIH
IOH = −12 mA
V IOH = −24 mA
IOH = −24 mA (Note 3)
V IOUT = 50 µA
VIN = VIL or VIH
IOL = 12 mA
V IOL = 24 mA
IOL = 24 mA (Note 3)
µA VI = VCC, GND
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC or GND
VI(OE) = VIL, VIH
µA VI = VCC, GND
VO = VCC, GND
Figures 5, 6
V
(Note 6)(Note 7)
www.fairchildsemi.com
4

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74ACTQ464ASPC 전자부품, 판매, 대치품
AC Electrical Characteristics for ACTQ
VCC
TA = +25°C
TA = −40°C to +85°C
Symbol
Parameter
(V) CL = 50 pF
CL = 50 pF
Units
(Note 17)
Min
Typ
Max
Min
Max
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tOSHL
tOSLH
Propagation Delay
Clock to Bus
Propagation Delay
Bus to Bus
Propagation Delay
SBA or SAB to An or Bn
(w/An or Bn HIGH or LOW)
Enable Time
G to An or Bn
Disable Time
G to An or Bn
Enable Time
DIR to An or Bn
Disable Time
DIR to An or Bn
Output to Output
Skew (Note 18) Select to Bus
or Clock to Bus
5.0 2.5 8.5 10.5 2.5 11.0 ns
5.0 2.0 8.0 10.0 2.0 10.5 ns
5.0 2.5 8.5 10.5 2.5 11.0 ns
5.0
2.5
10.0
12.0
2.5
12.5
ns
5.0 1.0 7.0 8.5 1.0 9.0 ns
5.0
2.5
10.0
12.0
2.5
12.5
ns
5.0 1.0 7.0 8.5 1.0 9.0 ns
5.0 0.5 1.0 1.0 ns
tOSHL
tOSLH
Output to Output
Skew (Note 18)
Bus to Bus
5.0 1.0 1.5 1.5 ns
Note 17: Voltage Range 5.0 is 5.0V ± 0.5V
Note 18: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by
design. Not tested.
AC Operating Requirements for ACTQ
Symbol
Parameter
tS Setup Time, HIGH or LOW
Bus to Clock
tH Hold Time, HIGH or LOW
Bus to Clock
tW Clock Pulse Width
HIGH or LOW
Note 19: Voltage Range 5.0 is 5.0V ± 0.5V
VCC
(V)
(Note 19)
5.0
5.0
5.0
TA = +25°C
CL = 50 pF
Typ
TA = −40°C to +85°C
CL = 50 pF
Guaranteed Minimum
3.0 3.0
1.5 1.5
4.0 4.0
Units
ns
ns
ns
Capacitance
Symbol
CIN
CI/O
CPD
Parameter
Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
Typ
4.5
15.0
90.0
Units
pF
pF
pF
VCC = OPEN
VCC = 5.0V
VCC = 5.0V
Conditions
7 www.fairchildsemi.com

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부품번호상세설명 및 기능제조사
74ACTQ464ASPC

Quiet Series Octal Transceiver/Register with 3-STATE Outputs

Fairchild Semiconductor
Fairchild Semiconductor

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