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74ACTQ574PC PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 74ACTQ574PC
기능 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs
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74ACTQ574PC 데이터시트, 핀배열, 회로
January 1990
Revised November 1999
74ACQ574 74ACTQ574
Quiet SeriesOctal D-Type Flip-Flop
with 3-STATE Outputs
General Description
The ACQ/ACTQ574 is a high-speed, low-power octal D-
type flip-flop with a buffered Common Clock (CP) and a
buffered common Output Enable (OE). The information
presented to the D inputs is stored in the flip-flops on the
LOW-to-HIGH clock (CP) transition.
ACQ/ACTQ574 utilizes FACT Quiet Seriestechnology to
guarantee quiet output switching and improve dynamic
threshold performance. FACT Quiet Series features GTO
output control and undershoot corrector in addition to a
split ground bus for superior performance.
The ACQ/ACTQ574 is functionally identical to the
ACTQ374 but with different pin-out.
Features
s ICC and IOZ reduced by 50%
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Guaranteed pin-to-pin skew AC performance
s Inputs and outputs on opposite sides of the package
allowing easy interface with microprocessors
s Functionally identical to the ACQ/ACTQ374
s 3-STATE outputs drive bus lines or buffer memory
address registers
s Outputs source/sink 24 mA
s Faster prop delays than the standard AC/ACT574
Ordering Code:
Order Number Package Number
Package Description
74ACQ574SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body
74ACQ574SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACQ574PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
74ACTQ574SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300Wide Body
74ACTQ574SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACTQ574PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide
Device also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
D0D7
CP
OE
O0O7
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
FACT, Quiet Series, FACT Quiet Seriesand GTOare trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation DS010634
www.fairchildsemi.com




74ACTQ574PC pdf, 반도체, 판매, 대치품
DC Electrical Characteristics for ACQ (Continued)
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C
Units
(V) Typ
Guaranteed Limits
VOLP
VOLV
VIHD
Quiet Output
Maximum Dynamic VOL
Quiet Output
Minimum Dynamic VOL
Minimum HIGH Level
Dynamic Input Voltage
5.0 1.1 1.5
5.0 0.6 1.2
5.0 3.1 3.5
V
V
V
VILD
Maximum LOW Level
Dynamic Input Voltage
5.0 1.9 1.5
V
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
Note 5: DIP package.
Note 6: Max number of outputs defined as (n). Data inputs are driven 0V to 5V. One output @ GND.
Note 7: Maximum number of data inputs (n) switching. (n1) inputs switching 0V to 5V (ACQ). Input-under-test switching:
5V to threshold (VILD), 0V to threshold (VIHD). f = 1 MHz.
Conditions
Figure 1, Figure 2
(Note 5)(Note 6)
Figure 1, Figure 2
(Note 5)(Note 6)
(Note 5)(Note 7)
(Note 5)(Note 7)
DC Electrical Characteristics for ACTQ
Symbol
Parameter
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
VCC
TA = +25°C
TA = −40°C to +85°C
(V) Typ
Guaranteed Limits
4.5 1.5 2.0
2.0
5.5 1.5
2.0
2.0
4.5 1.5
0.8
0.8
5.5 1.5
0.8
0.8
4.5 4.49 4.4
4.4
5.5 5.49 5.4
5.4
VOL Maximum LOW Level
Output Voltage
4.5 3.85
5.5 4.86
4.5 0.001
0.1
5.5 0.001
0.1
3.76
4.76
0.1
0.1
4.5
0.36
0.44
5.5
0.36
0.44
IIN Maximum Input Leakage Current 5.5
IOZ Maximum 3-STATE
Leakage Current
5.5
±0.1
±0.25
±1.0
±2.5
ICCT
IOLD
IOHD
ICC
Maximum ICC/Input
Minimum Dynamic
Output Current (Note 9)
Maximum Quiescent
Supply Current
5.5 0.6
5.5
5.5
5.5
4.0
1.5
75
75
40.0
VOLP
VOLV
VIHD
Quiet Output
Maximum Dynamic VOL
Quiet Output
Minimum Dynamic VOL
Minimum HIGH Level
Dynamic Input Voltage
5.0 1.1
1.5
5.0 0.6 1.2
5.0 1.9
2.2
VILD
Maximum LOW Level
Dynamic Input Voltage
5.0 1.2
0.8
Note 8: All outputs loaded; thresholds on input associated with output under test.
Note 9: Maximum test duration 2.0 ms, one output loaded at a time.
Note 10: DIP package.
Note 11: Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND.
Units
Conditions
V VOUT = 0.1V
or VCC 0.1V
V VOUT = 0.1V
or VCC 0.1V
V IOUT = −50 µA
VIN = VIL or VIH
V IOH= −24 mA
IOH= −24 mA (Note 8)
V IOUT = 50 µA
VIN = VIL or VIH
V IOL = 24 mA
IOL = 24 mA (Note 8)
µA VI = VCC, GND
µA VI = VIL, VIH
VO = VCC, GND
mA VI = VCC 2.1V
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC
or GND
Figure 1, Figure 2
V
(Note 10)(Note 11)
Figure 1, Figure 2
V
(Note 10)(Note 11)
V (Note 10)(Note 12)
V (Note 10)(Note 12)
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74ACTQ574PC 전자부품, 판매, 대치품
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture
Tektronics Model 7854 Oscilloscope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper load-
ing of the outputs and that the input levels are at the
correct voltage.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measure-
ment.
5. Set the HFS generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with an oscilloscope.
VOLP/VOLV and VOHP/VOHV:
Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
Measure VOLP and VOLV on the quiet output during the
worst case for active and enable transition. Measure
VOHP and VOHV on the quiet output during the worst
case active and enable transition.
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
VILD and VIHD:
Monitor one of the switching outputs using a 50coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
First increase the input LOW voltage level, VIL, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input LOW voltage level at which
oscillation occurs is defined as VILD.
Next decrease the input HIGH voltage level, VIH, until
the output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds VIL limits, or on output HIGH levels that
exceed VIH limits. The input HIGH voltage level at which
oscillation occurs is defined as VIHD.
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
Note 19: VOHV and VOLP are measured with respect to ground reference.
Note 20: Input pulses have the following characteristics: f = 1 MHz,
tr = 3 ns, tf = 3 ns, skew < 150 ps.
FIGURE 1. Quiet Output Noise Voltage Waveforms
FIGURE 2. Simultaneous Switching Test Circuit
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부품번호상세설명 및 기능제조사
74ACTQ574PC

Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs

Fairchild Semiconductor
Fairchild Semiconductor

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