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Número de pieza | 74AHCT574PW | |
Descripción | Octal D-type flip-flop; positive edge-trigger; 3-state | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! INTEGRATED CIRCUITS
DATA SHEET
74AHC574; 74AHCT574
Octal D-type flip-flop; positive
edge-trigger; 3-state
Product specification
File under Integrated Circuits, IC06
1999 Jun 16
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D0 D1 D2 D3 D4 D5 D6 D7
DQ
FF1
CP
DQ
FF2
CP
DQ
FF3
CP
DQ
FF4
CP
DQ
FF5
CP
DQ
FF6
CP
DQ
FF7
CP
DQ
FF8
CP
CP
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
MNA449
Fig.5 Logic diagram.
5 Page Philips Semiconductors
Octal D-type flip-flop; positive edge-trigger; 3-state
Product specification
74AHC574;
74AHCT574
Type 74AHCT574
GND = 0 V; tr = tf ≤ 3.0 ns.
TEST CONDITIONS
Tamb (°C)
SYMBOL PARAMETER
WAVEFORMS CL
+25 −40 to +85 −40 to +125 UNIT
VCC (V)
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
tPHL/tPLH
tPZH/tPZL
tPHZ/tPLZ
tPHL/tPLH
tPZH/tPZL
tPHZ/tPLZ
tW
tsu
th
fmax
propagation
delay
CP to Qn
3-state output
enable time
OE to Qn
3-state output
disable time
OE to Qn
propagation
delay
CP to Qn
3-state output
enable time
OE to Qn
3-state output
disable time
OE to Qn
clock pulse
width
HIGH or LOW
see Figs 6
and 9
see Figs 7
and 9
see Figs 6
and 9
see Figs 7
and 9
see Figs 6
and 9
setup time
Dn to CP
hold time
Dn to CP
maximum
clock pulse
frequency
see Figs 8
and 9
see Figs 6
and 9
15 pF 4.5 to 5.5 − 4.4(1) 8.6 1.0 10.0 1.0 11.0 ns
− 4.3(1) 9.0 1.0 10.5 1.0 11.5 ns
− 4.3(1) 9.0 1.0 10.5 1.0 11.5 ns
50 pF
− 6.3(1) 10.6 1.0 12.0 1.0 13.5 ns
− 6.1(1) 11.0 1.0 12.5 1.0 14.0 ns
− 6.2(1) 10.1 1.0 11.5 1.0 13.0 ns
5.0 − − 5.5 − 5.5 − ns
15 pF
3.0 −
−
1.5 −
−
85 115 −
130 180 −
3.5 −
1.5 −
75 −
110 −
3.5 −
1.5 −
75 −
110 −
ns
ns
MHz
MHz
Note
1. Typical values at VCC = 5.0 V.
1999 Jun 16
11
11 Page |
Páginas | Total 20 Páginas | |
PDF Descargar | [ Datasheet 74AHCT574PW.PDF ] |
Número de pieza | Descripción | Fabricantes |
74AHCT574PW | Octal D-type flip-flop; positive edge-trigger; 3-state | NXP Semiconductors |
74AHCT574PWDH | Octal D-type flip-flop; positive edge-trigger; 3-state | NXP Semiconductors |
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