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74ALVC163245 데이터시트 PDF




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부품번호 74ALVC163245 기능
기능 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
제조업체 Fairchild Semiconductor
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74ALVC163245 데이터시트, 핀배열, 회로
November 2001
Revised November 2001
74ALVC163245
Low Voltage 16-Bit Dual Supply Translating Transceiver
with 3-STATE Outputs
General Description
The ALVC163245 is a dual supply, 16-bit translating trans-
ceiver that is designed for 2 way asynchronous communi-
cation between busses at different supply voltages by
providing true signal translation. The supply rails consist of
VCCA, which is a higher potential rail operating at 2.3V to
3.6V and VCCB, which is the lower potential rail operating at
1.65V to 2.7V. (VCCB must be less than or equal to VCCA
for proper device operation). This dual supply design
allows for translation from 1.8V to 2.5V busses to busses at
a higher potential, up to 3.3V.
The Transmit/Receive (T/R) input determines the direction
of data flow. Transmit (active-HIGH) enables data from
A Ports to B Ports; Receive (active-LOW) enables data
from B Ports to A Ports. The Output Enable (OE) input,
when HIGH, disables both A and B Ports by placing them
in a High-Z condition. The A Port interfaces with the higher
voltage bus (2.7V to 3.3V); The B Port interfaces with the
lower voltage bus (1.8V to 2.5V). Also the ALVC163245 is
designed so that the control pins (T/Rn, OEn) are supplied
by VCCB.
The 74ALVC163245 is suitable for mixed voltage applica-
tions such as notebook computers using a 1.8V CPU and
3.3V peripheral components. It is fabricated with an
Advanced CMOS technology to achieve high speed opera-
tion while maintaining low CMOS power dissipation.
Features
s Bidirectional interface between busses ranging from
1.65V to 3.6V
s Supports Live Insertion and Withdrawal (Note 1)
s Uses patented Quiet Seriesnoise/EMI reduction
circuitry
s Functionally compatible with 74 series 16245
s Latchup conforms to JEDEC JED78
s ESD performance:
Human Body Model >2000V
Machine model >200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1: To ensure the high impedance state during power up or power
down, OEn should be tied to VCCB through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Description
74ALVC163245GX
(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
(Preliminary) [Tape and Reel]
74ALVC163245T
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2: BGA package available in Tape and Reel only.
Note 3: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Quiet Seriesis a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation ds500695
www.fairchildsemi.com




74ALVC163245 pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings(Note 4)
Supply Voltage
VCCA
VCCB
DC Input Voltage (VI)
DC Output Voltage (VI/O) (Note 5)
An
Bn
DC Input Diode Current (IIK)
VI < 0V
DC Output Diode Current (IOK)
VO < 0V
DC Output Source/Sink Current
(IOH/IOL)
DC VCC or Ground Current
Supply Pin (ICC or Ground)
Storage Temperature (TSTG)
0.5V to +4.6V
0.5V to VCCA
0.5V to +4.6V
0.5V to VCCA + 0.5V
0.5V to VCCB + 0.5V
50 mA
50 mA
±50 mA
±100 mA
65°C to +150°C
Recommended Operating
Conditions (Note 6)
Power Supply (Note 7)
VCCA
VCCB
Input Voltage (VI) @ OE, T/R
Input/Output Voltage (VI/O)
An
Bn
Free Air Operating Temperature (TA
Minimum Input Edge Rate (t/V)
2.3V to 3.6V
1.65V to 2.7V
0V to VCCB
0V to VCCA
0V to VCCB
40°C to +85°C
VIN = 0.8V to 2.0V, VCC = 3.0V
10 ns/V
Note 4: The Absolute Maximum Ratingsare those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditionstable will define the conditions
for actual device operation.
Note 5: IO Absolute Maximum Rating must be observed.
Note 6: Unused inputs or I/O pins must be held HIGH or LOW. They may
not float.
Note 7: Operation requires: VCCB VCCA
DC Electrical Characteristics
Symbol
Parameter
VIHA
HIGH Level Input Voltage An
Conditions
VCCB
(V)
1.65 - 1.95
1.65 - 2.7
VCCA
(V)
2.3 - 2.7
3.0 - 3.6
Min
1.7
2.0
Max
VIHB
VILA
Bn, T/R, OE
LOW Level Input Voltage An
1.65 - 1.95
2.3 - 2.7
1.65 - 1.95
1.65 - 2.7
2.3 - 3.6
3.0 - 3.6
2.3 - 2.7
3.0 - 3.6
0.65 x VCCB
1.6
0.7
0.8
VILB
VOHA
VOHB
VOLA
VOLB
II
IOZ
IOFF
ICCA/ICCB
ICC
Bn, T/R, OE
1.65 - 1.95
2.3 - 2.7
HIGH Level Output Voltage
HIGH Level Output Voltage
Low Level Output Voltage
Low Level Output Voltage
IOH = −100 µA
IOH = −12 mA
IOH = −24 mA
IOH = −100 µA
IOH = −4 mA
IOH = −12 mA
IOL = 100 µA
IOL = 12 mA
IOL = 24 mA
IOL = 100 µA
IOL = 4 mA
IOL = 12 mA
1.65 - 2.7
1.65
1.65 - 2.3
1.65 - 2.7
1.65 - 1.95
2.3 - 2.7
1.65 - 2.7
1.65
1.65 - 2.3
1.65 - 2.7
1.65 - 1.95
2.3 -2.7
Input Leakage Current @ OE, T/R
3-STATE Output Leakage
Power Off Leakage Current
Quiescent Supply Current,
per supply, VCCA / VCCB
0V VI 3.6V
0V VO 3.6V
OE = VCCB
VI = VIH or VIL
0(VI, VO) 3.6V
An = VCCA or GND
Bn, OE, & T/R = VCCB or GND
1.65 - 2.7
1.65 - 2.7
0
1.65 - 2.7
Increase in ICC per Input, Bn, T/R, OE VI = VCCB 0.6V
Increase in ICC per Input, An
VI = VCCA 0.6V
1.65 - 2.2
1.65 - 2.2
2.3 - 3.6
3.0 - 3.6
2.3 - 3.6
2.3 - 2.7
3.0 - 3.6
2.3 - 3.6
2.3 - 3.0
3.0
2.3 - 3.6
2.3 - 2.7
3.0 - 3.6
2.3 - 3.6
2.3 - 3.0
3.0
2.3 - 3.6
2.3 - 3.6
0
2.3 - 3.6
2.3 - 3.6
2.3 - 3.6
VCCA0.2
1.7
2
VCCB0.2
1.2
1.7
0.35 x VCCB
0.7
0.2
0.7
0.55
0.2
0.45
0.7
±5.0
±10
10
40
750
750
Units
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
www.fairchildsemi.com
4

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74ALVC163245 전자부품, 판매, 대치품
AC Loading and Waveforms
TABLE 1. Values for Figure 1
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
SWITCH
Open
VL
GND
FIGURE 1. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f = 1MHz; tr = tf = 2ns; Z0 = 50)
Symbol
Vmi
Vmo
VX
VY
VL
3.3V ± 0.3V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
6V
2.7V
1.5V
1.5V
VOL + 0.3V
VOH 0.3V
6V
VCC
2.5V ± 0.2V
VCC/2
VCC/2
VOL + 0.15V
VOH 0.15V
VCC*2
1.8V ± 0.15V
VCC/2
VCC/2
VOL + 0.15V
VOH 0.15V
VCC*2
FIGURE 2. Waveform for Inverting and Non-inverting Functions
tr = tf 2.0 ns, 10% to 90%
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
tr = tf 2.0 ns, 10% to 90%
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
tr = tf 2.0 ns, 10% to 90%
7 www.fairchildsemi.com

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부품번호상세설명 및 기능제조사
74ALVC163245

Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs

Fairchild Semiconductor
Fairchild Semiconductor
74ALVC163245GX

Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs

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