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PDF 74ALVT16652 Data sheet ( Hoja de datos )
| Número de pieza | 74ALVT16652 | |
| Descripción | 2.5V/3.3V 16-bit bus transceiver/register 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74ALVT16652
2.5V/3.3V 16-bit bus transceiver/register
(3-State)
Product specification
Supersedes data of 1996 Aug 13
IC23 Data Handbook
1998 Feb 13
Philips
Semiconductors
1 page  
Philips Semiconductors
2.5V/3.3V 16-bit bus transceiver/register
(3-State)
Product specification
74ALVT16652
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ALVT16652. The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins
determine the direction of the data flow.
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
A BA B
AB
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
L L X X XL
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
H H X X LX
TRANSFER STORED DATA
TO A OR B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
X H ↑ X XX
L X X ↑ XX
L H ↑ ↑ XX
1998 Feb 13
AB
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
H L H|L H|L H H
5
SH00066
5 Page 
Philips Semiconductors
2.5V/3.3V 16-bit bus transceiver/register
(3-State)
Product specification
74ALVT16652
nSBA or
nSAB
nAx or nBx
VM
tPHL
VM
VM
tPLH
VM
3.0V or VCC
0V
VOH
VOL
SH00032
Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx
ÉÉÉ ÉÉÉÉÉÉÉÉÉnAxor
nBx
VM
ÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉts(H)
VM
th(H)
VM
ts(L)
VM
th(L)
3.0V
or
VCC
0V
3.0V
or
nCPBA or
VCC
nCPAB
VM
VM
tW(L)
0V
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SH00049
Waveform 4. Data Setup and Hold Times
TEST CIRCUIT AND WAVEFORMS
nOEBA
nOEAB
VM
tPZH
VM
tPHZ
3.0V or VCC
whichever
is less
0V
VOH
nAx or nBx
VM VY
0V
SH00050
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
nOEBA
nOEAB
nAx or
nBx
VM
tPZL
VM
tPLZ
VM
3.0V
or
VCC
0V
3.0V
or
VCC
VX
VOL 0V
SH00051
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
PULSE
GENERATOR
VIN
VCC
D.U.T.
VOUT
6.0V or VCC x 2
90%
Open
NEGATIVE
GND
PULSE
RL
VM
10%
tW
tTHL (tF)
VM
10%
VIN
90%
0V
tTLH (tR)
RT CL RL
Test Circuit for 3-State Outputs
SWITCH POSITION
POSITIVE
PULSE
10%
tTLH (tR)
90%
VM
tW
90%
VM
tTHL (tF)
VIN
10%
0V
TEST
tPLZ/tPZL
tPLH/tPHL
tPHZ/tPZH
SWITCH
6V or VCC x 2
Open
GND
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance:
See AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
FAMILY
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate tW
tR
tF
3.0V or VCC
74ALVT16 whichever v10MHz
is less
500ns v2.5ns v2.5ns
SW00025
1998 Feb 13
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet 74ALVT16652.PDF ] | |
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