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74AVCM162834 데이터시트 PDF




NXP Semiconductors에서 제조한 전자 부품 74AVCM162834은 전자 산업 및 응용 분야에서
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부품번호 74AVCM162834 기능
기능 18-bit registered driver with inverted register enable and 15 ohm termination resistors 3-State
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74AVCM162834 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74AVCM162834
18-bit registered driver
with inverted register enable and
15 termination resistors (3-State)
Product specification
File under Integrated Circuits ICL03
2001 Apr 20
Philips
Semiconductors




74AVCM162834 pdf, 반도체, 판매, 대치품
Philips Semiconductors
18-bit registered driver with inverted register enable
and 15 termination resistors (3-State)
168-pin SDR SDRAM DIMM
BACK SIDE
Product specification
74AVCM162834
FRONT SIDE
74AVCM16834 74AVCM16834 74AVCM16834 PCK2509S or PCK2510S
The PLL clock distribution device and AVCM registered drivers reduce signal loads on the memory
controller and prevent timing delays and waveform distortions that would cause unreliable operation
SW00407
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
VCC
VI
VO
Tamb
DC supply voltage
(according to JEDEC Low Voltage Standards)
DC supply voltage
(for low voltage applications)
DC Input voltage range
DC output voltage range; output 3-State
DC output voltage range;
output HIGH or LOW state
Operating free-air temperature range
tr, tf Input rise and fall times
CONDITIONS
VCC = 1.65 to 2.3 V
VCC = 2.3 to 3.0 V
VCC = 3.0 to 3.6 V
MIN
1.65
2.3
3.0
1.2
0
0
0
–40
0
0
0
MAX
1.95
2.7
3.6
3.6
3.6
3.6
VCC
+85
30
20
10
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
CONDITIONS
RATING
VCC DC supply voltage
IIK DC input diode current
VI DC input voltage
VI t0
For all inputs1
IOK DC output diode current
VO uVCC or VO t 0
VO
DC output voltage; output 3-State
Note 1
VO
DC output voltage;
output HIGH or LOW state
Note 1
–0.5 to +4.6
–50
–0.5 to 4.6
"50
–0.5 to 4.6
–0.5 to VCC +0.5
IO
DC output source or sink current
VO = 0 to VCC
"50
IGND, ICC DC VCC or GND current
Tstg Storage temperature range
PTOT
Power dissipation per package
For temperature range: –40 to +125 °C
–plastic thin-medium-shrink (TSSOP) above +55°C derate linearly with 8 mW/K
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
"100
–65 to +150
600
UNIT
V
V
V
°C
ns/V
UNIT
V
mA
V
mA
V
V
mA
mA
°C
mW
2001 Apr 20
4

4페이지










74AVCM162834 전자부품, 판매, 대치품
Philips Semiconductors
18-bit registered driver with inverted register enable
and 15 termination resistors (3-State)
Product specification
74AVCM162834
AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V RANGE
VM = 0.5 VCC
VX = VOL + 0.300 V
VY = VOH – 0.300 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI = VCC
AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND
VCC < 2.3 V RANGE
VM = 0.5 VCC
VX = VOL + 0.15 V
VY = VOH – 0.15 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
VI = VCC
VI
An
INPUT
VM
GND
VOH
tPHL
tPLH
Yn
OUTPUT
VM
VOL
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00132
Waveform 1. Input (An) to output (Yn) propagation delay
VI
LE INPUT
GND
VM
tW
tPHL
VM
tPLH
VOH
Yn OUTPUT
VM
VOL
NOTE: VM = 0.5 VCC at VCC = 2.3 to 2.7 V
SH00165
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Yn) propagation delays.
VI
CP INPUT
GND
1/fMAX
VM
tW
tPHL
VM
tPLH
VOH
Yn OUTPUT
VM
VOL
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00135
Waveform 3. The clock (CP) to Yn propagation delays, the
clock pulse width and the maximum clock frequency.
ÉÉÉVI
An
ÉÉÉINPUT
ÉÉÉGND
VM
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ
th th
tSU
VI
tSU
LE
INPUT
VM
GND
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00166
Waveform 4. Data set-up and hold times for the An input to the
LE input
VI
CP INPUT
VM
GND
tsu tsu
An
VI
INPUT
GND
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉth ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉthÉÉÉÉÉÉ
VOH
Yn OUTPUT
VM
VOL
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00136
Waveform 5. Data set-up and hold times for the An input to the
clock CP input
VI
nOE INPUT
GND
VM
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
tPLZ
VX
tPZL
VM
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
tPHZ
VY
tPZH
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V
SH00137
Waveform 6. 3-State enable and disable times
2001 Apr 20
7

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