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부품번호 | 74F175SJ 기능 |
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기능 | Quad D Flip-Flop | ||
제조업체 | National Semiconductor | ||
로고 | |||
전체 8 페이지수
November 1994
54F 74F175 Quad D Flip-Flop
General Description
The ’F175 is a high-speed quad D flip-flop The device is
useful for general flip-flop requirements where clock and
clear inputs are common The information on the D inputs is
stored during the LOW-to-HIGH clock transition Both true
and complemented outputs of each flip-flop are provided A
Master Reset input resets all flip-flops independent of the
Clock or D inputs LOW
Features
Y Edge-triggered D-type inputs
Y Buffered positive edge-triggered clock
Y Asynchronous common reset
Y True and complement output
Y Guaranteed 4000V minimum ESD protection
Commercial
74F175PC
74F175SC (Note 1)
74F175SJ (Note 1)
Military
54F175DM (Note 2)
54F175FM (Note 2)
54F175LM (Note 2)
Package
Number
N16E
J16A
M16A
M16D
W16A
E20A
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
IEEE IEC
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9490–5
TL F 9490 – 1
TL F 9490 – 2
TL F 9490 – 3
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9490
RRD-B30M75 Printed in U S A
AC Electrical Characteristics
Symbol
Parameter
fmax
tPLH
tPHL
tPHL
tPLH
Maximum Clock Frequency
Propagation Delay
CP to Qn or Qn
Propagation Delay
MR to Qn
Propagation Delay
MR to Qn
74F
TA e a25 C
VCC e a5 0V
CL e 50 pF
Min Typ Max
100 140
40 50 65
40 65 85
4 5 9 0 11 5
40 65 80
54F
TA VCC e Mil
CL e 50 pF
Min Max
80
35 85
4 0 10 5
4 5 15 0
4 0 10 0
AC Operating Requirements
Symbol
Parameter
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(L)
trec
Setup Time HIGH or LOW
Dn to CP
Hold Time HIGH or LOW
Dn to CP
CP Pulse Width
HIGH or LOW
MR Pulse Width LOW
Recovery Time MR to CP
74F
TA e a25 C
VCC e a5 0V
Min Max
30
30
10
10
40
50
50
50
54F
TA VCC e Mil
Min Max
30
30
10
20
40
50
50
50
74F
TA VCC e Com
CL e 50 pF
Min Max
100
40 75
40 95
4 5 13 0
40 90
74F
TA VCC e Com
Min Max
30
30
10
10
40
50
50
50
Units
MHz
ns
ns
ns
Units
ns
ns
ns
ns
4
4페이지 Physical Dimensions inches (millimeters) (Continued)
16-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ)
NS Package Number M16D
16-Lead (0 300 Wide) Molded Dual-In-Line Package (P)
NS Package Number N16E
7
7페이지 | |||
구 성 | 총 8 페이지수 | ||
다운로드 | [ 74F175SJ.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
74F175SC | Quad D-Type Flip-Flop | Fairchild Semiconductor |
74F175SC | Quad D Flip-Flop | National Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |