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74ABT161543 데이터시트 PDF




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부품번호 74ABT161543 기능
기능 16-bit latched transceiver with dual enable and master reset 3-State
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74ABT161543 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
74ABT161543
74ABTH161543
16-bit latched transceiver with
dual enable and master reset (3-State)
Product specification
Supersedes data of 1995 Sep 18
IC23 Data Handbook
1998 Feb 27
Philips
Semiconductors




74ABT161543 pdf, 반도체, 판매, 대치품
Philips Semiconductors
16-bit latched transceiver with dual enable
and master reset (3-State)
Product specification
74ABT161543
74ABTH161543
LOGIC SYMBOL
5 6 8 9 10 12 13 14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
3 1EAB
54 1EBA
2 1LEAB
55 1LEBA
MRab
1OEAB
1OEBA
MRba
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
52 51 49 48 47 45 44 43
15 16 17 19 20 21 23 24
4
1
56
25
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
26 2EAB
31 2EBA
27 2LEAB
30 2LEBA
MRab
2OEAB
2OEBA
MRba
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
4
28
29
25
42 41 40 38 37 36 34 33
SH00064
FUNCTIONAL DESCRIPTION
The 74ABT161543 contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (nEAB) input and the A-to-B Latch
Enable (nLEAB) input are Low the A-to-B path is transparent.
A subsequent Low-to-High transition of the nLEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and nOEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the nEBA,
nLEBA, and nOEBA inputs.
FUNCTION TABLE
INPUTS
OUTPUTS
nOEXX
nMRXX
nEXX
nLEXX
nAx or nBx
nBx or nAx
LLLX
X
L
HXXX
X
Z
XXHX
X
Z
LHL
LHL
h
l
Z
Z
LHL
LHL
h
l
H
L
LHL L
LHL L
H
L
H
L
LHLH
X
NC
H=
h=
L=
l=
X=
=
NC=
Z=
High voltage level
High voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
Low voltage level
Low voltage level one set-up time prior to the Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
Don’t care
Low-to-High transition of nLEXX or nEXX (XX = AB or BA)
No change
High impedance or “off” state
STATUS
Clear
Disabled
Disabled
Disabled + Latch
Latch + Display
Transparent
Hold
1998 Feb 27
4

4페이지










74ABT161543 전자부품, 판매, 대치품
Philips Semiconductors
16-bit latched transceiver with dual enable
and master reset (3-State)
Product specification
74ABT161543
74ABTH161543
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
SYMBOL
PARAMETER
WAVEFORM
tPLH
tPHL
tPLH
tPHL
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
Propagation delay
nAx to nBx, nBx to nAx
Propagation delay
LEBA to nAx, LEAB to nBx
MRba to nAx, MRab to nBx
Output enable time
OEBA to nAx, OEAB to nBx
Output disable time
OEBA to nAx, OEAB to nBx
Output enable time
EBA to nAx, EAB to nBx
Output disable time
EBA to nAx, EAB to nBx
2
1
2
6
4
5
4
5
4
5
4
5
LIMITS
Tamb = +25oC
VCC = +5.0V
Tamb = –40 to +85oC
VCC = +5.0V ±0.5V
MIN TYP MAX
MIN
MAX
1.2 2.5 3.4 1.2
1.0 2.2 2.9 1.0
3.9
3.5
1.2 3.0 4.1 1.2
1.2 2.6 3.5 1.2
5.1
4.1
1.2 2.6 3.4 1.2
4.2
1.4 3.3 4.4 1.4
1.4 3.4 4.4 1.4
5.5
5.6
1.4 3.5 4.8 1.4
1.4 2.7 3.5 1.4
5.4
4.0
1.4 3.4 4.4 1.4
1.4 3.5 4.4 1.4
5.6
5.7
1.3 3.5 4.4 1.3
1.3 2.7 3.5 1.3
5.4
4.0
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
SYMBOL
PARAMETER
WAVEFORM
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(L)
tw(L)
Setup time
nAx to LEAB, nBx to LEBA
Hold time
nAx to LEAB, nBx to LEBA
Setup time
nAx to EAB, nBx to EBA
Hold time
nAx to EAB, nBx to EBA
Latch enable pulse width, Low
MR Pulse width, Low
3
3
3
3
3
6
LIMITS
Tamb = +25oC
VCC = +5.0V
MIN TYP
Tamb = –40 to +85oC
VCC = +5.0V ±0.5V
MIN
1.5 –0.3
2.0 0.1
1.5
2.0
1.5 –0.1
2.0 0.1
1.5
2.0
1.5 –0.1
2.0 0.2
1.5
2.0
1.5 –0.1
2.0 –0.1
1.5
2.0
4.0 2.0
4.0
3.0 1.0
3.0
UNIT
ns
ns
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
1998 Feb 27
7

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부품번호상세설명 및 기능제조사
74ABT161543

16-bit latched transceiver with dual enable and master reset 3-State

NXP Semiconductors
NXP Semiconductors

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