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74ABT374ADB 데이터시트 PDF




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부품번호 74ABT374ADB 기능
기능 Octal D-type flip-flop; positive-edge trigger 3-State
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74ABT374ADB 데이터시트, 핀배열, 회로
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger
(3-State)
Product specification
74ABT374A
FEATURES
8-bit positive edge triggered register
3-State output buffers
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Power-up 3-State
Power-up reset
Live insertion/extraction permitted
DESCRIPTION
The 74ABT374A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT374A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates.
The register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “OFF” state, which
means they will neither drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
COUT
ICCZ
Propagation delay
CP to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled; VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
3.4
3.8
4
7
110
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT374A N
74ABT374A D
74ABT374A DB
74ABT374A PW
NORTH AMERICA
74ABT374A N
74ABT374A D
74ABT374A DB
74ABT374APW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN CONFIGURATION
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1 OE Output enable input (active-Low)
3, 4, 7, 8,
13, 14, 17,
18
D0-D7 Data inputs
2, 5, 6, 9,
12, 15, 16,
19
Q0-Q7 Data outputs
11 CP Clock pulse input (active rising edge)
10 GND Ground (0V)
20 VCC Positive supply voltage
SA00110
1995 Sep 06
1 853-1448 15704




74ABT374ADB pdf, 반도체, 판매, 대치품
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger
(3-State)
Product specification
74ABT374A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = +25°C
Tamb = –40°C
to +85°C
UNIT
MIN TYP MAX MIN MAX
VIK Input clamp voltage
VCC = 4.5V; IIK = –18mA
–0.9 –1.2
–1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or VIH
2.5 2.9
2.5
V
VOH High-level output voltage
VCC = 5.0V; IOH = –3mA; VI = VIL or VIH
3.0 3.4
3.0
V
VCC = 4.5V; IOH = –32mA; VI = VIL or VIH
2.0 2.4
2.0
V
VOL Low-level output voltage
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH
0.42 0.55
0.55 V
VRST Power-up output low voltage3 VCC = 5.5V; IO = 1mA; VI = GND or VCC
0.13 0.55
0.55 V
II
IOFF
IPU/IPD
IOZH
Input leakage current
Power-off leakage current
Power-up/down 3-State
output current
3-State output High current
VCC = 5.5V; VI = GND or 5.5V
VCC = 0.0V; VO or VI 4.5V
VCC = 0.0V; IO = 1mA; VI = GND or VCC;
V OE = Don’t Care
VCC = 5.5V; VO = 2.7V; VI = VIL or VIH
±0.01 ±1.0
±5.0 ±100
±5.0 ±50
5.0 50
±1.0
±100
±50
50
µA
µA
µA
µA
IOZL 3-State output Low current
VCC = 5.5V; VO = 0.5V; VI = VIL or VIH
–5.0 –50
–50 µA
ICEX
IO
Output High leakage current
Output current1
VCC = 5.5V; VO = 0.5V; VI = GND or VCC
VCC = 5.5V; VO = 2.5V
5.0 50
50 µA
–50 –100 –180 –50 –180 mA
ICCH
VCC = 5.5V; Outputs High, VI = GND or VCC
110 250
250 µA
ICCL Quiescent supply current
VCC = 5.5V; Outputs Low, VI = GND or VCC
24 30
30 mA
ICCZ
VCC = 5.5V; Outputs 3–State;
VI = GND or VCC
110 250
250 µA
ICC
Additional supply current per VCC = 5.5V; one input at 3.4V,
input pin2
other inputs at VCC or GND
0.5 1.5
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
1.5 mA
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
SYMBOL
PARAMETER
WAVEFORM
fMAX
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Maximum clock frequency
Propagation delay
CP to Qn
Output enable time
to High and Low level
Output disable time
from High and Low level
1
1
3
4
3
4
LIMITS
Tamb = +25oC
VCC = +5.0V
Min Typ Max
200 300
1.7 3.4
2.0 3.8
4.5
4.9
1.2 3.5
2.2 4.3
4.5
5.4
1.8 3.6
1.5 3.0
4.7
4.1
Tamb = -40 to
+85oC
VCC = +5.0V ±0.5V
Min Max
200
1.7 5.1
2.0 5.2
1.2 5.4
2.2 6.2
1.8 5.2
1.5 4.3
UNIT
ns
ns
ns
ns
1995 Sep 06
4

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부품번호상세설명 및 기능제조사
74ABT374AD

Octal D-type flip-flop; positive-edge trigger 3-State

NXP Semiconductors
NXP Semiconductors
74ABT374ADB

Octal D-type flip-flop; positive-edge trigger 3-State

NXP Semiconductors
NXP Semiconductors

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