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74AC125 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 74AC125은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 74AC125 기능
기능 Quad Buffer with 3-STATE Outputs
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74AC125 데이터시트, 핀배열, 회로
January 2008
74AC125, 74ACT125
Quad Buffer with 3-STATE Outputs
Features
ICC reduced by 50%
Outputs source/sink 24mA
ACT125 has TTL-compatible outputs
General Description
The AC/ACT125 contains four independent non-inverting
buffers with 3-STATE outputs.
Ordering Information
Order
Number
74AC125SC
74AC125SJ
74AC125MTC
74AC125PC
74ACT125SC
74ACT125SJ
74ACT125MTC
74ACT125PC
Package
Number
M14A
M14D
MTC14
N14A
M14A
M14D
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
An, Bn
On
Description
Inputs
Outputs
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
Function Table
Inputs
An Bn
LL
LH
HX
Output
On
L
H
Z
H = HIGH Voltage Level, L = LOW Voltage Level
Z = HIGH Impedance, X = Immaterial
www.fairchildsemi.com




74AC125 pdf, 반도체, 판매, 대치품
DC Electrical Characteristics for ACT
Symbol
Parameter
VIH Minimum HIGH Level
Input Voltage
VIL Maximum LOW Level
Input Voltage
VOH Minimum HIGH Level
Output Voltage
VOL Maximum LOW Level
Output Voltage
IIN
IOZ
ICCT
IOLD
IOHD
ICC
Maximum Input
Leakage Current
Maximum 3-STATE
Current
Maximum ICC/Input
Minimum Dynamic
Output Current(5)
Maximum Quiescent
Supply Current
VCC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
5.5
Conditions
VOUT = 0.1V or
VCC – 0.1V
VOUT = 0.1V or
VCC – 0.1V
IOUT = –50µA
VIN = VIL or VIH,
IOH = –24mA
VIN = VIL or VIH,
IOH = –24mA(4)
IOUT = 50µA
VIN = VIL or VIH,
IOL = 24mA
VIN = VIL or VIH,
IOL= 24mA(4)
VI = VCC, GND
TA = +25°C TA = –40°C to +85°C
Typ.
Guaranteed Limits
1.5 2.0
2.0
1.5 2.0
2.0
1.5 0.8
0.8
1.5 0.8
0.8
4.49 4.4
4.4
5.49 5.4
5.4
3.86 3.76
Units
V
V
V
4.86 4.76
0.001
0.001
0.1
0.1
0.36
0.1
0.1
0.44
V
0.36 0.44
±0.1 ±1.0
µA
5.5 VI = VIL, VIH;
VO = VCC, GND
5.5 VI = VCC – 2.1V(6)
5.5 VOLD = 1.65V Max.
5.5 VOHD = 3.85V Min.
5.5 VIN = VCC or GND
0.6
±0.5
4.0
±5.0
1.5
75
–75
40.0
µA
mA
mA
mA
µA
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
6. May be measured per the JEDEC Alternate Method.
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
4
www.fairchildsemi.com

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74AC125 전자부품, 판매, 대치품
Physical Dimensions (Continued)
Figure 2. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
7
www.fairchildsemi.com

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