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PDF 74AC138 Data sheet ( Hoja de datos )
| Número de pieza | 74AC138 | |
| Descripción | 1-of-8 Decoder/Demultiplexer | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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74AC138
3 TO 8 LINE DECODER (INVERTING)
s HIGH SPEED: tPD =4.5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 oC
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The AC138 is an advanced high-speed CMOS 3
TO 8 LINE DECODER (INVERTING) fabricated
with sub-micron silicon gate and double-layer
metal wiring C2MOS technology.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of the outputs will
BM
(Plastic Package)
(Micro Package)
ORDER CODES :
74AC138B
go low. If enable input G1 is held low or either
G2A or G2B is held high, the decoding function is
inhibited and all the 8 outputs go to high.
Tree enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
It is ideal for low power applications mantaining
high speed operation similar to equivalent Bipolar
Schottky TTL.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 1997
1/9
1 page  
74AC138
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symbol
P ar ame te r
tPLH Propagation Delay Time
tPHL A,B,C to Y
tPLH Propagation Delay Time
tPHL G1to Y
tPLH Propagation Delay Time
tPHL G2A or G2B to Y
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5V ± 0.5V
Test Condition
V CC
(V)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
Value
TA = 25 oC
-40 to 85 oC
Min. Typ. Max. Min. Max.
1.5 5.5 13 1.5 14
1.5 4.5 9 1.5 10
1.5 6 13 1.5 14
1.5 4.5 11 1.5 12
1.5 5.5 13 1.5 14
1.5 4.5 9 1.5 10
Unit
ns
ns
ns
CAPACITIVE CHARACTERISTICS
Symbol
P ar ame te r
Test Conditions
V CC
(V)
Value
TA = 25 oC
-40 to 85 oC
Min. Typ. Max. Min. Max.
Unit
CIN Input Capacitance
5.0
4 pF
CPD Power Dissipation
Capacitance (note 1)
5.0
60 pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to
Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n (per circuit)
TEST CIRCUIT
CL = 50 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74AC138.PDF ] | |
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