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부품번호 62256 기능
기능 32Kx8 bit Low Power CMOS Static RAM
제조업체 Samsung semiconductor
로고 Samsung semiconductor 로고


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62256 데이터시트, 핀배열, 회로
KM62256C Family
Document Title
32Kx8 bit Low Power CMOS Static RAM
CMOS SRAM
Revision History
Revision No History
0.0 Advance information
0.1 Initial draft
1.0 Finalize
2.0 Revise
- Add 45ns part with 30pF test load
3.0 Revise
- Change specification format and merge :
Commercial, Extended, Industrial product in same datasheets.
4.0 Revise
- Change Speed bin
Erase 45ns part from commercial product and 100ns from
extended and industrial product.
- Production change
Erase Low power product from TSOP package
Draft Data
February 12th 1993
Remark
Design target
November 2nd 1993 Preliminary
September 24th 1994 Final
August 12th 1995
Final
April 15th 1996
Final
December 19 1997 Final
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications and product. SAMSUNG Electronics will evaluate and reply to your requests and questions about
device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
1 Revision 4.0
December 1997




62256 pdf, 반도체, 판매, 대치품
KM62256C Family
CMOS SRAM
RECOMMENDED DC OPERATING CONDITIONS 1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
VIH
VIL
Note
1. Commercial Product : TA=0 to 70°C, unless otherwise specified
Extended Product : TA=-25 to 85°C, unless otherwise specified
Industrial Product : TA=-40 to 85°C, unless otherwise specified
2. Overshoot : VCC+3.0V in case of pulse width30ns
3. Undershoot : -3.0V in case of pulse width30ns
4. Overshoot and undershoot is sampled, not 100% tested
Min
4.5
0
2.2
-0.53)
CAPACITANCE 1) (f=1MHz, TA=25°C)
Item
Input capacitance
Input/Output capacitance
Symbol
CIN
CIO
1. Capacitance is sampled, not 100% tested
Test Condition
VIN=0V
VIO=0V
Typ
5.0
0
-
-
Min
-
-
Max
5.5
0
Vcc+0.5V2)
0.8
Unit
V
V
V
V
Max Unit
6 pF
8 pF
DC AND OPERATING CHARACTERISTICS
Item
Symbol
Test Conditions
Min Typ Max Unit
Input leakage current
ILI VIN=Vss to Vcc
-1 -
1 µA
Output leakage current
ILO CS=VIH or WE=VIL, VIO=Vss to Vcc
-1 -
1 µA
Operating power supply current
ICC IIO=0mA, CS=VIL, VIN=VIH or VIL
- 7 151) mA
Average operating current
ICC1
Cycle time=1µs, 100% duty, IIO=0mA
CS0.2V, VIN0.2V, VINVcc -0.2V
- - 72) mA
ICC2
Cycle time=Min,100% duty, IIO=0mA, CS=VIL, VIN=VIH or VIL -
- 70 mA
Output low voltage
VOL IOL=2.1mA
- - 0.4 V
Output high voltage
VOH IOH=-1.0mA
2.4 - - V
Standby Current(TTL)
ISB CS=VIH, Other inputs=VIH or VIL
- - 13) mA
KM62256CL
KM62256CL-L
Standby Current KM62256CLE
(CMOS)
KM62256CLE-L
ISB1
CSVcc-0.2V,
Other inputs=0~Vcc
L(Low Power)
LL(L Low Power)
L(Low Power)
LL(L Low Power)
-
-
-
-
2 100 µA
1 20
- 100 µA
- 50
KM62256CLI
KM62256CLI-L
L(Low Power)
LL(L Low Power)
-
-
- 100 µA
- 50
1. 20mA for Extended and Industrial Products
2. 10mA for Extended and Industrial Products
3. 2mA for Extended and Industrial Products
4 Revision 4.0
December 1997

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62256 전자부품, 판매, 대치품
KM62256C Family
TIMING WAVEFORM OF WRITE CYCLE(1) (WE Controlled)
Address
CS
WE
Data in
Data out
tAS(3)
Data Undefined
tWC
tCW(2)
tAW
tWP(1)
tWR(4)
tWHZ
tDW tDH
Data Valid
tOW
CMOS SRAM
TIMING WAVEFORM OF WRITE CYCLE(2) (CS Controlled)
Address
CS
tAS(3)
tWC
tCW(2)
tAW
tWP(1)
tWR(4)
WE
Data in
tDW tDH
Data Valid
Data out
High-Z
High-Z
NOTES (WRITE CYCLE)
1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE
going low : A write end at the earliest transition amongCS going high and WE going high, tWP is measured from the begining of write
to the end of write.
2. tCW is measured from the CS going low to end of write.
3. tAS is measured from the address valid to the beginning of write.
4. tWR is measured from the end of write to the address change. tWR applied in case a write ends as CS or WE going high.
DATA RETENTION WAVE FORM
CS controlled
VCC
4.5V
tSDR
2.2V
VDR
CS
GND
Data Retention Mode
CSVCC - 0.2V
7
tRDR
Revision 4.0
December 1997

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