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KM416S4030C 데이터시트 PDF




Samsung semiconductor에서 제조한 전자 부품 KM416S4030C은 전자 산업 및 응용 분야에서
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부품번호 KM416S4030C 기능
기능 1M x 16Bit x 4 Banks Synchronous DRAM
제조업체 Samsung semiconductor
로고 Samsung semiconductor 로고


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KM416S4030C 데이터시트, 핀배열, 회로
KM416S4030C
Revision History
Revision 1 (May 1998)
- ICC2N value (10mA) is changed to 12mA.
Revision .2 (June 1998)
- tSH (-10 binning) is revised.
Preliminary
CMOS SDRAM
REV. 2 June '98




KM416S4030C pdf, 반도체, 판매, 대치품
KM416S4030C
Preliminary
CMOS SDRAM
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on V DD supply relative to Vss
Storage temperature
Power dissipation
Short circuit current
Symbol
VIN, VOUT
VDD, VDDQ
TSTG
PD
IOS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
1
50
Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Unit
V
V
°C
W
mA
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V SS = 0V, T A = 0 to 70 °C)
Parameter
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current (Inputs)
Input leakage current (I/O pins)
Symbol
VDD, VDDQ
VIH
VIL
VOH
VOL
IIL
IIL
Min
3.0
2.0
-0.3
2.4
-
-1
-1.5
Typ Max Unit
3.3 3.6
V
3.0 VDDQ +0.3
V
0 0.8 V
- -V
- 0.4 V
- 1 uA
- 1.5 uA
Notes : 1. VIH (max) = 5.6V AC. The overshoot voltage duration is 3ns.
2. VIL (min) = -2.0V AC. The undershoot voltage duration is 3ns.
3. Any input 0V VIN VDDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V VOUT VDDQ.
Note
1
2
IOH = -2mA
IOL = 2mA
3
3,4
CAPACITANCE (VDD = 3.3V, T A = 23°C, f = 1MHz, V REF = 1.4V ± 200 mV)
Pin
Clock
RAS, CAS, WE, CS, CKE, L(U)DQM
Address
DQ0 ~ DQ 15
Symbol
CCLK
CIN
CADD
COUT
Min
2.5
2.5
2.5
4.0
Max
4.0
5.0
5.0
6.5
Unit
pF
pF
pF
pF
REV. 2 June '98

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KM416S4030C 전자부품, 판매, 대치품
KM416S4030C
Preliminary
CMOS SDRAM
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
Symbol
-7
Min Max
CLK cycle time
CAS latency=3
CAS latency=2
tCC
7
1000
10
CLK to valid
output delay
CAS latency=3
CAS latency=2
tSAC
6
6
Output data
hold time
CAS latency=3
CAS latency=2
tOH
3
3
CLK high pulse width
tCH 3
CLK low pulse width
tCL 3
Input setup time
tSS 2
Input hold time
tSH 1
CLK to output in Low-Z
tSLZ 1
CLK to output
in Hi-Z
CAS latency=3
CAS latency=2
tSHZ
6
6
-8
Min Max
8
1000
10
6
6
3
3
3
3
2
1
1
6
6
-H
Min Max
10
1000
10
6
6
3
3
3
3
2
1
1
6
6
-L
Min Max
10
1000
12
6
7
3
3
3
3
2
1
1
6
7
-10
Unit Note
Min Max
10
1000 ns
13
1
7
ns 1,2
7
3
ns 2
3
3.5 ns 3
3.5 ns 3
2.5 ns 3
1 ns 3
1 ns 2
7
ns
7
Notes : 1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
DQ BUFFER OUTPUT DRIVE CHARACTERISTICS
Parameter
Output rise time
Symbol
trh
Condition
Measure in linear
region : 1.2V ~ 1.8V
Min
1.37
Typ
Output fall time
tfh
Measure in linear
region : 1.2V ~ 1.8V
1.30
Output rise time
trh
Measure in linear
region : 1.2V ~ 1.8V
2.8
3.9
Output fall time
tfh
Measure in linear
region : 1.2V ~ 1.8V
2.0
2.9
Notes : 1. Rise time specification based on 0pF + 50 to VSS, use these values to design to.
2. Fall time specification based on 0pF + 50 to VDD, use these values to design to.
3. Measured into 50pF only, use these values to characterize to.
4. All measurements done with respect to V SS.
Max
4.37
3.8
5.6
5.0
Unit
Volts/ns
Volts/ns
Volts/ns
Volts/ns
Notes
3
3
1,2
1,2
REV. 2 June '98

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