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부품번호 | KT3170 기능 |
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기능 | LOW POWER DTMF RECEIVER | ||
제조업체 | Samsung semiconductor | ||
로고 | |||
전체 7 페이지수
KT3170
LOW POWER DTMF RECEIVER
INTRODUCTION
The KT3170 is a complete Dual Tone Multiple Frequency
(DTMF) receiver that is fabricated by low power CMOS
and the Switched-Capacitor Filter technology.
This LSI consists of band split filters, which seperates
counting section which verifies the frequency and
duration of the received tones before passing the cor-
responding code to the output bus. It decodes all 16
DTMF tone pairs into a 4bits digital code.
The externally required components are minimized by
on chip provision of a differential input AMP, clock
oscillator and latched three state interface. The on chip
clock generator requires only a low cost TV cystal as
an external component.
FEATURES
• Detects all 16 standard tones.
• Low power consumption : 15mW (Typ)
• Single power supply : 5V
• Uses inexpensive 3.58MHz crystal
• Three state outputs for microprocessor interface
• Good quality and performance for using in
exchange system
• Power down mode/input inhibit
APPLICATIONS
• PABX
• Central Office
• Paging Systems
• Remote Control
• Credit Card Systems
• Key Phone System
• Answering Phone
• Home Automation System
• Mobile Radio
• Remote Data Entry
18-DIP-300A
ORDERING INFORMATION
Device
KT3170N
Package
18-DIP-300A
Operating
- 25°C ~ + 75°C
PIN CONFIGURATION
IN+ 1
IN- 2
GS 3
4VREF
IIN 5
PDN 6
OSC1 7
OSC2 8
GND 9
KT3170
18 VDD
17 SI/GTO
16 ESO
15 DSO
14 Q4
13 Q3
12 Q2
11 Q1
10 OE
Fig. 1
KT3170
LOW POWER DTMF RECEIVER
AC ELECTRICAL CHARACTERISTICS (VDD = 5V, Ta = 25°C, fCK = 3.579545MHz)
Characteristic
Valid Input Signal Range
(each tone of composite signal)
Dual Tone Twist Accept
Acceptable Frequency Deviation
Frequency Deviation Reject
Third Tone Tolerance
Noise Tolerance
Dial Tolerance
Crystal Clock Frequency
Maximum Clock Input Rise Time
Maximum Clock Input Fall Time
Acceptable Clock Input Duty Cycle
Acceptable Capacitive Load
Tone Present Detect Time
Tone Absent Detect Time
Minimum Tone Duration Accept
Maximum Tone Duration Reject
Acceptable Interdigit Pause
Rejectable Interdigit Pause
Propagation Delay Time SI to Q
Propagation Delay Time SI to DSO
Output Data Setup Q to DSO
Propagation Delay Time OE to Q
(Enable)
Propagation Delay Time OE to Q
(disable)
Symbol
VI (VAL)
TW
∆f
∆fR
T3rd
TN
DT
fCK
tR (MAX)
tF (MAX)
DCK
CL
tDET (P)
tDET (A)
tTDA (MIN)
tTDR (MAX)
tIDP (A)
tIDP (R)
tD (SI-Q)
tD (SI-D)
tSU
tD (QE-Q) EN
tD (OE-Q) DIS
Test Conditions
-
-
-
-
-
-
-
-
External Clock
External Clock
External Clock
OSC2 PIN
-
-
User Adjustable
User Adjustable
User Adjustable
User Adjustable
OE = High
OE = High
OE = High
RL = 10K, CL = 50pF
RL = 10K, CL = 50pF
Min Typ Max Unit
-29 - 1.0 dBm
- ± 10 -
- - ± 1.5%
± 2Hz
± 3.5% -
-
-25 -16
-
- -12 -
18 22
-
3.5759 3.5795 3.5831
- - 110
- - 110
40 50 60
- - 30
5 11 14
0.5 4 8.5
- - 40
20 -
-
- - 40
20 -
-
- 8 11
- 12 16
- 3.4 -
- 50 60
dB
-
-
dB
dB
dB
MHz
nS
nS
%
pF
mS
mS
mS
mS
mS
mS
µS
µS
µS
nS
- 300
-
nS
Notes : 1. Digit sequence consists of all 16 DTMF tones.
2. Tone duration = 40mS, Tone pause = 40mS.
3. Nominal DTMF frequencies are used.
4. Both tones in the composite signal have an equal amplitude.
5. Tone pair is deviated by ± 1.5% ± 2Hz.
6. Bandwidth limited (3KHz) Gaussian Noise.
7. The precise dial tone frequencies are (350Hz and 440Hz) ± 2%.
8. For an error rate of better than 1 in 10000.
9. Referenced to lowest level frequency component in DTMF signal.
10. Minimum signal acceptance level is measured with specitied maximum frequency deviation.
11. This item also applies to a third tone injected onto the power supply.
12. Referenced to Fig. 1 Input DTMF tone level at -28dBm.
4페이지 KT3170
LOW POWER DTMF RECEIVER
APPLICATION CIRCUIT
0.1uF 100K
IN+
IN-
100K
GS
V DD
SI/GTO
ESO
+5V
300K
VR E F
DSO
IIN
PDN
3.58MHz
OSC1
Q4
Q3
Q2
OSC2
Q1
GND
OE
All resistors are 1% tolerance
All capacitors are 5% tolerance
Fig. 4 Single Ended Input Configuration
10nF 100K
C 1 R1
10nF
100K
C 2 R2
IN+ 1
IN-
GS
2
R3
37.5K
R5
R2 100K
60K
VREF
3
4
+
_
KT3170
R3 = R2R5/(R2+R5), VOLTAGE GAIN = R5/R1
INPUT IMPEDANCE : 2 √R12 + (1/wC)2
All resistors are 1% tolerance
All capacitors are 5% tolerance
Fig. 5 Differential Ended Input Configuration
VDD
CC
SI/GTO
SI/GTO
ESO
R1
R2
ESO
R1
R2
tPGT = (R1C) In (VDD/VDD-VTH)
tAGT = (RPC) In (VDD/VTST)
RP = R1R2/(R1 + R2)
(a) Decreasing tAGT (tPGT > tAGT)
tPGT = (RPC) In (VDD/VDD-VTH)
tAGT = (R1C) In (VDD/VTH)
RP = R1R2 (R1 + R2)
(a) Decreasing tPGT (tPGT< tAGT)
Fig. 6 Guard Time Adjustment
KT3170
OSC1
OSC2
KT3170
30pF
OSC1
3.579545MH z
OSC2
Fig. 7 Oscillator Connection
T O O S C 1 o f n ex t K T 3 1 7 0
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
KT3170 | LOW POWER DTMF RECEIVER | Samsung semiconductor |
KT3170N | LOW POWER DTMF RECEIVER | Samsung semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |