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부품번호 | J108 기능 |
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기능 | N-Channel JFET Switch | ||
제조업체 | Calogic LLC | ||
로고 | |||
전체 1 페이지수
CORPORATION
N-Channel JFET Switch
J108 – J110 / SST108 – SST110
FEATURES
Low Cost
• Automated Insertion Package
• Low Insertion Loss
•• No Offset or Error Voltages Generated by Closed Switch
Purely Resistive
High Isolation Resistance from Driver
Fast Switching
•• Low Noise
PIN CONFIGURATION
TO-92
D SG
5018
SOT-23
G
D
S
PRODUCT MARKING (SOT-23)
SST108
I08
SST109
I09
SST110
I10
APPLICATIONS
Analog Switches
• Choppers
• Commutators
•• Low-Noise Audio Amplifiers
A(TBAS=O2L5UoCTEunMleAsXsIMotUheMrwRisAeTsINpeGcSified)
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . -25V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Storage Temperature Range . . . . . . . . . . . . . -55oC to +150oC
Operating Temperature Range . . . . . . . . . . . -55oC to +135oC
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 360mW
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 3.3mW/oC
NOTE: Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part Package
J108-110 Plastic TO-92
XJ108-110 Sorted Chips in Carriers
SST109-110 Plastic SOT-23
Temperature Range
-55oC to +135oC
-55oC to +135oC
-55oC to +135oC
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified)
SYMBOL
IGSS
VGS(off)
BVGSS
IDSS
ID(off)
rDS(on)
Cdg(off)
Csg(off)
Cdg(on)
+ Csg(on)
td(on)
tr
td(off)
tf
PARAMETER
Gate Reverse Current (Note 1)
Gate-Source Cutoff Voltage
Gate-Source Breakdown Voltage
Drain Saturation Current (Note 2)
Drain Cutoff Current (Note 1)
Drain-Source ON Resistance
Drain-Gate OFF Capacitance
Source-Gate OFF Capacitance
Drain-Gate Plus Source-Gate
ON Capacitance
Turn On Delay Time
Rise Time
Turn OFF Delay Time
Fall Time
108 109 110
UNITS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
-3 -3 -3 nA
-3 -10 -2
-25 -25
-6 -0.5
-25
-4
V
80 40 10
mA
3 3 3 nA
8 12 18 Ω
15 15 15
15 15 15 pF
85 85 85
444
111
6 6 6 ns
30 30 30
TEST CONDITIONS
VDS = 0V, VGS = -15V
VDS = 5V, ID = 1µA
VDS = 0V, IG = -1µA
VDS = 15V, VGS = 0V
VDS = 5V, VGS = -10V
VDS ≤0.1V, VGS = 0V
VDS = 0,
VGS = -10V
(Note 3)
f = 1MHz
VDS = VGS = 0
(Note 3)
Switching Time Test
Conditions (Note 3)
J107 J109
VDD 1.5V 1.5V
VGS(off) -12V -7V
RL 150Ω 150Ω
J110
1.5V
-5V
150Ω
NOTES: 1. Approximately doubles for every 10oC increase in TA.
2. Pulse test duration = 300µs; duty cycle ≤3%.
3. For design reference only, not 100% tested.
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구 성 | 총 1 페이지수 | ||
다운로드 | [ J108.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
J105 | N-Channel JFETs | Vishay Telefunken |
J105 | N-Channel Switch | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |