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S3P70F4 데이터시트 PDF




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부품번호 S3P70F4 기능
기능 The S3C70F2/C70F4 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange
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S3P70F4 데이터시트, 핀배열, 회로
S3C70F2/C70F4/P70F4
1 PRODUCT OVERVIEW
PRODUCT OVERVIEW
OVERVIEW
The S3C70F2/C70F4 single-chip CMOS microcontroller has been designed for high-performance using
Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
The S3P70F4 is the microcontroller which has 4 Kbyte one-time-programmable ROM and the functions are the
same to S3C70F2/C70F4. With a four-channel comparator, eight LED direct drive pins, serial I/O interface, and
its versatile 8-bit timer/counter, the S3C70F2/C70F4 offers an excellent design solution for a wide variety of
general-purpose applications.
Up to 24 pins of the 30-pin SDIP package can be dedicated to I/O. Five vectored interrupts provide fast response
to internal and external events. In addition, the S3C70F2/C70F4's advanced CMOS technology provides for very
low power consumption and a wide operating voltage range — all at a very low cost.
1-1




S3P70F4 pdf, 반도체, 판매, 대치품
PRODUCT OVERVIEW
S3C70F2/C70F4/P70F4
DATA MEMORY
Overview
Data memory is organized into three areas:
— 32 × 4-bit working registers
— 224 × 4-bit general-purpose area in bank 0
— 256 × 4-bit general-purpose area in bank 1
— 128 × 4-bit area in bank 15 for memory-mapped I/O addresses
Data stored in data memory can be manipulated by 1-, 4-, and 8-bit instructions.
Data memory is organized into two memory banks — bank 0, bank 1 and bank 15. The select memory bank in-
struction (SMB) selects the bank to be used as working data memory. After power-on reset operation,
initialization values for data memory must be redefined by code.
Data Memory Addressing Modes
The enable memory bank (EMB) flag controls the addressing mode for data memory banks 0, 1 or 15.
When the EMB flag is logic zero, restricted area can be accessed. When the EMB flag is set to logic one, all two
data memory banks can be accessed according to the current SMB value. The EMB = "0" addressing mode is
used for normal program execution, whereas the EMB = "1" mode is commonly used for interrupts, subroutines,
mapped I/O, and repetitive access of specific RAM addresses.
Working Registers
The RAM's working register area in data memory bank 0 is further divided into four register banks. Each register
bank has eight 4-bit registers that are addressable either by 1-bit or 4-bit instructions. Paired 4-bit registers can
be addressed as double registers by 8-bit instructions.
Register A is the 4-bit accumulator and double register EA is the 8-bit extended accumulator. Double registers
WX, WL, and HL are used as data pointers for indirect addressing. Unused working registers can be used as
general-purpose memory.
To limit the possibility of data corruption due to incorrect register bank addressing, register bank 0 is usually used
for the main program and banks 1, 2, and 3 for interrupt service routines.
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S3P70F4 전자부품, 판매, 대치품
S3C70F2/C70F4/P70F4
PRODUCT OVERVIEW
BIT SEQUENTIAL CARRIER
The bit sequential carrier (BSC) is a 16-bit register that can be manipulated using 1-, 4-, and 8-bit instructions.
Using 1-bit indirect addressing, addresses and bit locations can be specified sequentially. In this way, programs
can process 16-bit data by moving the bit location sequentially and then incrementing or decrementing the value
of the L register. BSC data can also be manipulated using direct addressing.
COMPARATOR
The S3C70F2/C70F4 contains a 4-channel comparator which can be multiplexed to normal input port.
— Conversion time: 15.2 µs, 121.6 µs at 4.19 MHz
— Two operation modes:
Three channels for analog input and one channel for external reference voltage input
Four channels for analog input and internal reference voltage level
— 16-level internal reference voltage generator
— 150 mV accuracy for input voltage level difference detection (maximum)
— Comparator enable and disable
The comparison results are read from the 4-bit CMPREG register after the specified conversion time.
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S3P70F4

The S3C70F2/C70F4 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange

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