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PDF S3P7324 Data sheet ( Hoja de datos )
| Número de pieza | S3P7324 | |
| Descripción | The S3C7324 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de S3P7324 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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S3C7324/P7324
1 PRODUCT OVERVIEW
PRODUCT OVERVIEW
OVERVIEW
The S3C7324 single-chip CMOS microcontroller has been designed for high performance using Samsung's
newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With features such as LCD direct drive capability, 4-channel A/D converter, 24-bit AM/FM frequency counter and
watch timer, the S3C7324 offers an excellent design solution for a wide variety of applications that require LCD
functions and audio applications.
Up to 32 pins of the 64-pin QFP package, it can be dedicated to I/O. Five vectored interrupts provide fast
response to internal and external events. In addition, the S3C7324 's advanced CMOS technology provides for
low power consumption and a wide operating voltage range.
OTP
The S3C7324 microcontroller is also available in OTP (One Time Programmable) version, S3P7324 . The
S3P7324 microcontroller has an on-chip 4-Kbyte one-time-programmable EPROM instead of masked ROM. The
S3P7324 is comparable to S3C7324, both in function and in pin configuration.
1-1
1 page  
S3C7324/P7324
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Pin Name
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
P4.0–P4.3
P5.0–P5.3
P6.0
P6.1
P6.2
P6.3
SEG0–SEG19
P8.0–P8.3
P9.0–P9.3
COM0–COM3
VDD
VSS
XOUT, XIN
XTOUT, XTIN
Table 1-1. S3C7324 Pin Descriptions
Pin
Type
Description
Number
I/O 4-bit I/O port.
1-bit or 4-bit read, write, and test are
possible. Each pin can be specified as
input or output port. Pull-up resistors can
be configured by software.
17
18
19
20
I 4-bit input port. 1-bit and 4-bit read and
test are possible.
Pull-up resistors can be configured by
software.
1
2
3
4
I 4-bit input port.
1-bit and 4-bit read and test are possible
Pull-up resistors can be configured by
software.
5
6
7
8
I/O 4-bit I/O ports. N-channel open-drain
output up to 5 V. 1-bit and 4-bit read,
write, and test are possible. Ports 4 and
5 can be paired to support 8-bit data.
Pull-up resistors can be configured by
software.
21–24
25–28
I/O 1-bit and 4-bit read, write, and test are
possible. Each pin can be specified as
input or output port. Pull-up resistors can
be configured by software.
29
30
31
32
O LCD segment signal output
60–41
O 4-bit output ports. 1-bit and 4-bit write
and test are possible. Ports 8 and 9 can
be paired to support 8-bit data.
33–36
37–40
O LCD common signal output
64–61
– Main power supply
9
– Main ground
10
– Crystal, ceramic, or RC oscillator pins for 11,12
main system clock. (For external clock
input, use XIN and input XIN's reverse
phase to XOUT)
– Crystal oscillator pin for a subsystem
15,14
clock. (For external clock input, use XTIN
and input XTIN's reverse phase to
XTOUT)
Share
Pin
INT0
INT1
INT2
INT4
Reset
Value
Input
Circuit
Type
D-4
–
–
FMF
AMF
ADC0
ADC1
ADC2
ADC3
–
–
Input
Input
A-4
A-4
B-4
B-4
F-13
Input E-2
BUZ
KS0
KS1
KS2
–
SEG27–
SEG20
Input
Output
Output
D-2
D-4
D-4
D-4
H-16
H-16
– Output H-16
– ––
– ––
– ––
– ––
1-5
5 Page 
S3C7324/P7324
15 ELECTRICAL DATA
ELECTRICAL DATA
OVERVIEW
In this section, information on S3C7324 electrical characteristics is presented as tables and graphics. The
information is arranged in the following order:
Standard Electrical Characteristics
— Absolute maximum ratings
— D.C. electrical characteristics
— Main system clock oscillator characteristics
— Subsystem clock oscillator characteristics
— I/O capacitance
— A.C. electrical characteristics
— Operating voltage range
Miscellaneous Timing Waveforms
— A.C timing measurement point
— Clock timing measurement at XIN
— Clock timing measurement at XTIN
— Input timing for RESET
— Input timing for external interrupts
Stop Mode Characteristics and Timing Waveforms
— RAM data retention supply voltage in stop mode
— Stop mode release timing when initiated by RESET
— Stop mode release timing when initiated by an interrupt request
15-1
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S3P7324.PDF ] | |
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