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부품번호 | K7N801849B-QC25 기능 |
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기능 | 256Kx36 & 512Kx18-Bit Pipelined NtRAMTM | ||
제조업체 | Samsung semiconductor | ||
로고 | |||
전체 18 페이지수
K7N803601B
K7N801801B
256Kx36 & 512Kx18 Pipelined NtRAMTM
Document Title
256Kx36 & 512Kx18-Bit Pipelined NtRAMTM
Revision History
Rev. No.
History
0.0 1. Initial document.
0.1 1. Add x32 org part and industrial temperature part
0.2 1. change scan order(1) form 4T to 6T at 119BGA(x18)
1.0 1. Final spec release
2. Change ISB2 form 50mA to 60mA
2.0 Change ordering information( remove 225MHz at Nt-Pipelined)
2.1 1. Delete 119BGA package
3.0 1. Remove x32 organization
Draft Date
May. 18. 2001
Aug. 11. 2001
Aug. 28 .2001
Nov. 16. 2001
April. 01. 2002
April. 04. 2003
Nov. 17. 2003
Remark
Preliminary
Preliminary
Preliminary
Final
Final
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 - Nov. 2003
Rev 3.0
K7N803601B
K7N801801B
PIN CONFIGURATION(TOP VIEW)
256Kx36 & 512Kx18 Pipelined NtRAMTM
DQPc
DQc0
DQc1
VDDQ
VSSQ
DQc2
DQc3
DQc4
DQc5
VSSQ
VDDQ
DQc6
DQc7
VDD
VDD
VDD
VSS
DQd0
DQd1
VDDQ
VSSQ
DQd2
DQd3
DQd4
DQd5
VSSQ
VDDQ
DQd6
DQd7
DQPd
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100 Pin TQFP
(20mm x 14mm)
K7N803601B(256Kx36)
K7N803201B(256Kx32)
80 DQPb
79 DQb7
78 DQb6
77 VDDQ
76 VSSQ
75 DQb5
74 DQb4
73 DQb3
72 DQb2
71 VSSQ
70 VDDQ
69 DQb1
68 DQb0
67 VSS
66 VDD
65 VDD
64 ZZ
63 DQa7
62 DQa6
61 VDDQ
60 VSSQ
59 DQa5
58 DQa4
57 DQa3
56 DQa2
55 VSSQ
54 VDDQ
53 DQa1
52 DQa0
51 DQPa
PIN NAME
SYMBOL
PIN NAME
TQFP PIN NO.
SYMBOL
A0 - A17
Address Inputs
ADV
Address Advance/Load
WE Read/Write Control Input
CLK Clock
CKE
Clock Enable
CS1 Chip Select
CS2 Chip Select
CS2 Chip Select
BWx(x=a,b,c,d) Byte Write Inputs
OE Output Enable
ZZ Power Sleep Mode
LBO
Burst Mode Control
32,33,34,35,36,37,44
45,46,47,48,49,50,81
82,83,99,100
85
88
89
87
98
97
92
93,94,95,96
86
64
31
VDD
VSS
N.C.
DQa0~a7
DQb0~b7
DQc0~c7
DQd0~d7
DQPa~Pd
VDDQ
VSSQ
PIN NAME
TQFP PIN NO.
Power Supply(+3.3V) 14,15,16,41,65,66,91
Ground
17,40,67,90
No Connect
38,39,42,43,84
Data Inputs/Outputs
52,53,56,57,58,59,62,63
68,69,72,73,74,75,78,79
2,3,6,7,8,9,12,13
18,19,22,23,24,25,28,29
51,80,1,30
Output Power Supply 4,11,20,27,54,61,70,77
(3.3V or 2.5V)
Output Ground
5,10,21,26,55,60,71,76
Notes : 1. The pin 84 is reserved for address bit for the 16Mb NtRAM.
2. A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.
- 4 - Nov. 2003
Rev 3.0
4페이지 K7N803601B
K7N801801B
256Kx36 & 512Kx18 Pipelined NtRAMTM
STATE DIAGRAM FOR NtRAMTM
WRITE
READ
READ BEGIN
READ
READ
DS
DESELECT
WRITE
DS
BEGIN WRITE
WRITE
DS DS
BURST BURST
READ
BURST BURST
WRITE
COMMAND
DS
READ
WRITE
BURST
DESELECT
BEGIN READ
BEGIN WRITE
BEGIN READ
BEGIN WRITE
CONTINUE DESELECT
ACTION
Notes : 1. An IGNORE CLOCK EDGE cycle is not shown is the above diagram. This is because CKE HIGH only blocks the clock(CLK) input and does
not change the state of the device.
2. States change on the rising edge of the clock(CLK)
- 7 - Nov. 2003
Rev 3.0
7페이지 | |||
구 성 | 총 18 페이지수 | ||
다운로드 | [ K7N801849B-QC25.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
K7N801849B-QC25 | 256Kx36 & 512Kx18-Bit Pipelined NtRAM | Samsung semiconductor |
K7N801849B-QC25 | 256Kx36 & 512Kx18-Bit Flow Through NtRAM | Samsung semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |