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PDF SM5904BF Data sheet ( Hoja de datos )
| Número de pieza | SM5904BF | |
| Descripción | compression and non compression type shock-proof memory controller | |
| Fabricantes | Nippon Precision Circuits Inc | |
| Logotipo |  |
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NIPPON PRECISION CIRCUITS INC.
SM5904BF
compression and non compression type
shock-proof memory controller
Overview
The SM5904BF is a compression and non com-
pression type shock-proof memory controller LSI for
compact disc players. The compression level can
be set in 4 levels, and external 4M DRAM can be
connected to expand the memory to 4M bits. Digital
attenuator, soft mute and related functions are also
incorporated. It operates from a 2.4 to 3.3 V supply
voltage range.
Features
- 2-channel processing
- Serial data input
⋅ 2s complement, 16-bit/MSB first, right-justified
format
- Wide capture function
(up to 3 × speed input rate)
- System clock input
⋅ 384fs (16.9344 MHz)
- Shock-proof memory controller
⋅ ADPCM compression method
⋅ 4-level compression mode selectable
4-bit compression mode 2.78 s/Mbit
5-bit compression mode 2.22 s/Mbit
6-bit compression mode 1.85 s/Mbit
Full-bit non compression mode 0.74 s/Mbit
⋅ External DRAM configurations usable
2 × 4M DRAM (1M × 4 bits)
Internal and External 4M DRAM
1 × 4M DRAM (1M × 4 bits)
Only Internal 4M DRAM
- Compression mode selectable
- Microcontroller interface
⋅ Serial command write and status read-out
⋅ Data residual detector:
15-bit operation, 16-bit output
⋅ Digital attenuator
8-bit setting
⋅ Soft attenuator function
Noiseless attenuation-level switching
(256- step switching in 23 ms max.)
⋅ Soft mute function
Mute ON in 23 ms max.
Direct return after soft mute release
⋅ Forced mute
- Extension I/O
Microcontroller interface for external control
using 4 extension I/O pins
- +2.4 to + 3.3 V operating voltage range
- Schmitt inputs
All input pins (including I/O pins) except CLK
(system clock)
- Reset signal noise elimination
Approximately 3.8 µs or longer (65 system
clock pulses) continuous LOW-level reset
- Digital audio interface (DIT)
- 44-pin QFP package (0.8 mm pin pitch)
Ordering Information
SM5904BF 44pin QFP
NIPPON PRECISION CIRCUITS-1
1 page  
<Pin summary>
(*1) Pin function
Pin name
(*2) Pin function
Pin name
(*3) Pin function
Pin name
(*4) Pin function
Pin name
(*5) Pin function
Pin name
(*6) Pin function
Pin name
(*7) Pin function
Pin name
SM5904BF
Clock input pin (AC input)
CLK
Schmitt input pins
YSRDATA, YLRCK, YSCK, YFLAG, YFCLK, NRESET,
YBLKCK, YDMUTE, YMLD, YMDATA, YMCLK
Schmitt input pin with pull-up
NTEST1, NTEST2
I/O pins (Schmitt input with pull-up in input state)
UC1, UC2, UC3, UC4
I/O pins (Schmitt input with pull-up in input state)
D0, D1, D2, D3
Outputs
ZSCK, ZLRCK, ZSRDATA, ZSENSE
Outputs
NCAS2, NWE, NRAS, A0, A1, A2, A3, A4, A5, A6, A7, A8, A9, DIT
NIPPON PRECISION CIRCUITS-5
5 Page 
SM5904BF
Functional description
SM5904BF has two modes of operation; shock- The operating sequences are controlled using com-
proof mode and through mode.
mands from a microcontroller.
Microcontroller interface
Commands from the microcontroller are input using
3-wire serial interface inputs; data (YMDATA), bit
clock (YMCLK) and load signal (YMLD).
In the case of a read command from the microcon-
troller, bit serial data is output (ZSENSE) synchro-
nized to the bit clock input (YMCLK).
Write command format (Commands 80 to 86)
YMDATA
DATA 8bit
COMMAND 8bit
D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0
YMCLK
YMLD
Write command format (Commands 87)
YMDATA
D11 D10
DATA 12bit
COMMAND 8bit
D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0
YMCLK
YMLD
Read command format (Commands 90, 91, 93)
YMDATA
COMMAND 8bit
B7 B6 B5 B4 B3 B2 B1 B0
YMCLK
YMLD
ZSENSE
STATUS 8bit
S7 S6 S5 S4 S3 S2 S1 S0
Read command format (Command 92 (memory residual read))
YMDATA
COMMAND 8bit
B7 B6 B5 B4 B3 B2 B1 B0
YMCLK
YMLD
ZSENSE
S7 S6
RESIDUAL DATA 16bit
S1 S0 M1 M2
M7 M8
NIPPON PRECISION CIRCUITS-11
11 Page | ||
| Páginas | Total 35 Páginas | |
| PDF Descargar | [ Datasheet SM5904BF.PDF ] | |
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