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SiW3500DIF1-T13 데이터시트, 핀배열, 회로
Preliminary
0
SiW3500
ULTIMATEBLUE
Features
• RF System on Chip (SoC) for
Bluetooth wireless technology
combining a 2.4 GHz transceiver,
baseband processor, and protocol
stack ROM.
• Bluetooth specification V1.2 qualified
including mandatory and optional
functions such as AFH and eSCO.
• Manufactured using standard
0.18-micron CMOS process
technology.
• UART based Host Control Interface
(HCI) transport layer supports
standard and 3-wire modes.
• Direct conversion RF architecture
improves receiver-blocking
performance.
• I/O voltage supply can range from
1.62 V to 3.63 V.
• -85 dBm receiver sensitivity and
+2 dBm transmitter power typical
performance specifications.
• Integrated analog and digital voltage
regulators simplify system design.
• 50 RF I/O does not need any
additional external impedance
matching components.
• Flexible reference clock source
options including crystal or direct
input from the host platform.
• Internal temperature compensated
transmitter and receiver circuits
deliver consistent performance from
-40° to +85°C.
• On-chip ROM software storage with
patch capability.
Applications
• Mobile phones and smart phones.
• Bluetooth audio headset.
• Bluetooth hands-free kit.
RF_I/O
PLL
Control
Clock Distribution
LNA
Internal
50-Ohm
Match
Network
PLL
Synthesizer
Power
Control
Aux ADC
DRIVER
0
90
0
90
Voltage Regulators and
Power Distribution
ADC
Optional flash interface
ARM7TDMI®
Processor
UART
ADC
DAC
GFSK
Modem
Bluetooth
Link
Controller
Data SRAM
Multi Function
I/Os
DAC
Firmware ROM
Audio CODEC
Interface
Block Diagram
Product Description
The UltimateBlue SiW3500™ is a RF System On Chip (SoC) that combines
a 2.4 GHz transceiver, baseband processor, and protocol stack software for
Bluetooth® wireless technology. Due to its low power CMOS process, the
SiW3500 is ideally suited for applications such as mobile phones, audio
headsets, and other embedded products.
The SiW3500 integrates an ARM7TDMI processor for software execution
from either internal ROM or external FLASH memory. The standard
SiW3500 ROM contains the Bluetooth lower layer stack software including
the HCI transport driver.
The SiW3500 is packaged in a 6 x 6 Pb-Free 96-VFBGA that meets RoHS
(Green) requirements. Known Good Die (KGD) is available for special
applications.
Optimum Technology Matching® Applied
Si BJT
Si Bi-CMOS
9GaAs HBT
SiGe HBT
GaAs MESFET
Si CMOS
GaInP/HBT
GaN HEMT
SiGe Bi-CMOS
60 0066 R00Hrf SiW3500 Radio Processor DS
November 8, 2004
Ordering Information
SiW3500
UltimateBlue
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
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SiW3500DIF1-T13 pdf, 반도체, 판매, 대치품
SiW3500
Preliminary
• Configuration of the CODEC interface is done by the firmware during boot-up by reading non-volatile memory (NVM)
parameters.
Multi-function I/Os (MFPs)
Up to 8 (eight) multi-function I/O ports are available in the SiW3500. The table below identifies the I/Os and their usage.
Multi Function I/O Number
MFP[0]
MFP[1]
MFP[2]
MFP[3]
MFP[4]
MFP[5]
MFP[6]
MFP[7]
Possible Usage Configuration
General purpose.
CLOCK_REQ_IN, HOST_WAKEUP, General purpose.
Address A[18], SYNC_CLOCK, AUX_RTS, General purpose.
FREQ_SEL[3], SYNC_DATA, General purpose.
FREQ_SEL[1], General purpose.
FREQ_SEL[2], General purpose.
AUX_RXD, General purpose.
AUX_CTS, TX_RX_SWITCH, General purpose.
External Memory Interface
The SiW3500 does not require additional memory for standard below HCI protocol functions. An external memory
interface is available for execution of protocol stack software from FLASH memory if desired. If external FLASH memory
will be used, the read access time of the device must be 100 ns or less.
Auxiliary UART
The SiW3500 can be configured and enabled with an auxiliary UART port. This UART port can be used for debug
depending on the application software.
AUX_TXD
AUX_RXD
AUX_CTS
AUX_RTS
Signal
Description
TX Data
RX Data
Clear To Send
Request To Send
External Power Amplifier Interface
The SiW3500 supports the use of an external power amplifier for +20 dBm designs. When enabled, these signals
provide an integrated interface for the control of an external PA.
IDAC
Signal
TX_RX_SWITCH
Description
Power control to external PA. This output provides a variable current source
that can be used to control the external PA. Leave unconnected if not used
Output signal used to indicate the state of the radio. This could be used as a
direction control for the PA. The polarity is programmable with the default set
as: Low = Transmit; High = Receive.
Power Management
The HOST_WAKEUP and EXT_WAKE signals are used for power management control of the SiW3500.
HOST_WAKEUP is an output signal used to indicate Bluetooth activity to the host. EXT_WAKE is an input signal used
by the host to wake up the SiW3500 from sleep mode.
For control of the reference clock source, CLOCK_REQ_IN and CLOCK_REQ_OUT can be made available to turn on/off
an external reference clock source.
General-Purpose Analog to Digital Converter (ADC)
The SiW3500 incorporates a general-purpose ADC that can be enabled to sample external analog voltage. The ADC
has an 8-bit resolution.
External EEPROM Controller and Interface
This interface is intended for communication to an optional EEPROM when using the SiW3500 in ROM mode. The
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60 0066 R00Hrf SiW3500 Radio Processor DS

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SiW3500DIF1-T13 전자부품, 판매, 대치품
Preliminary
SiW3500
Pin Description
The following table provides detailed listings of pin descriptions arranged by functional groupings.
Name
Pad Type
Ball
Description
Radio (Power from VCC)
RF_IO
Analog
TX_BIAS
Analog
VTUNE
Analog
CHG_PUMP
Analog
XTAL_N
Analog
XTAL_P/CLK
Analog
IDAC
Analog
ADC_IN
VREFN_CAP
VREFP_CAP
Analog
Analog
Analog
A2 RF signal. Input and output.
A4 Internal transmitter driver bias.
A6
Pin for reference PLL loop filter, only used if reference frequency is not
integer multiples of 4 MHz.
F1 Pin for RF loop filter.
B7
System clock crystal negative input. If a reference clock is used, this pin
should be left unconnected.
A7 System clock crystal positive input or reference clock input.
Power control to external power amplifier. This output provides a variable
B1 current source that can be used to control the external power amp. Leave
unconnected if not used.
J2 Analog to digital converter input or FREQ_SEL_(0).
C2 Decoupling capacitor for internal A/D converter voltage reference.
C1 Decoupling capacitor for internal A/D converter voltage reference.
Low Power Oscillator and Reset (Power from VDD_P_ALT)
CLK32K_IN
Analog
L1 For crystal or external clock input (32.768 kHz).
CLK32K_OUT
Analog
K1 Drive for crystal.
RESET_N
CMOS input
G1 System level reset (active low).
Power Control Interface (Power from VDD_P)
PWR_REG_EN
CMOS bi-directional G2
AUX_TXD
CMOS bi-directional G9
CLOCK_REQ_OUT control line for external TCXO by default, or can be
used as enable for an external voltage regulator. Programmable active
high or active low.
Auxiliary UART serial port output.
Multi-function (MFP) I/O (Power from VDD_P)
MFP [0]
CMOS bi-directional F3
MFP [1]
CMOS bi-directional J1
MFP [2]
CMOS bi-directional L6
MFP [3]
CMOS bi-directional F10
MFP [4]
CMOS bi-directional B9
MFP [5]
CMOS bi-directional C8
MFP [6]
CMOS bi-directional C7
MFP [7]
CMOS bi-directional C6
Multi-function I/O port.
Multi-function I/O port.
Multi-function I/O port.
Multi-function I/O port.
Multi-function I/O port.
Multi-function I/O port.
Multi-function I/O port.
Multi-function I/O port.
PCM Interface (Power from VDD_P_ALT)
PCM_IN
CMOS bi-directional H3
PCM_OUT
CMOS bi-directional L2
PCM_CLK
CMOS bi-directional K3
PCM_SYNC
CMOS bi-directional K2
PCM data output from SiW3500.
PCM data input to SiW3500.
PCM synchronous data clock to the remote device. Normally an output.
Input for slave mode.
PCM synchronization data strobe to the remote device. Normally an out-
put. Input for slave mode.
Table 1. SiW3500 Radio Processor Pin List
60 0066 R00Hrf SiW3500 Radio Processor DS
14-43

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