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PDF SC111 Data sheet ( Hoja de datos )
| Número de pieza | SC111 | |
| Descripción | SINK AND SOURCE DC/DC CONTROLLER FOR TERMINATION POWER SUPPLY APPLICATIONS | |
| Fabricantes | Semtech Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SC111 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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SINK AND SOURCE DC/DC CONTROLLER FOR SC1110
TERMINATION POWER SUPPLY APPLICATIONS
PRELIMINARY - October 9, 2000
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
DESCRIPTION
The SC1110 is a low-cost, full featured, synchronous
voltage-mode controller designed to generate termina-
tion voltage in double data rate (DDR) memory sys-
tems and other applications where wide data bus need
to be actively terminated. Synchronous control of the
MOSFET half bridge allows power flowing bi-
directionally. The termination voltage can be tightly
regulated to track the chipset voltage, i.e. to be exactly
50% of that at all times.
The SC1110 is ideal for low cost implementation of ter-
mination voltage supplies. SC1110 features include
temperature compensated voltage reference, triangle
wave oscillator and current sense comparator circuitry,
and allows the use of inexpensive N-channel power
switches.
The SC1110 operates at a fixed 250kHz, providing an
optimum compromise between efficiency, transient
performance, external component size, and cost.
FEATURES
•= Generates termination voltages for active termina-
tion schemes
•= 1% set point accuracy
•= For ±7A output current, transient regulation is bet-
ter than ±80mV
•= VREFIN pin available
•= Buffered VREFOUT for system usage
•= RDSON sensing for over current protection in hiccup
mode
•= Soft start and logic input enabling
•= 250kHz switching for best transient and efficiency
performance
•= Gate drive capable for 0.5A sourcing and sinking
APPLICATIONS
•= For DDR memory systems
•= For active termination schemes in high speed logic
systems
TYPICAL APPLICATION CIRCUIT
ORDERING INFORMATION
DEVICE(1) PACKAGE
SC1110CSTR SO-14
TEMP. RANGE (TJ)
0 - 125°C
Note:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
REFOUT
R1 C1
5k 0.01
SS/ENBL
PWRGD
C3
0.1
C25
0.1
+5Vcc
R2
1.24k
C2
0.1
R3
10 U1
SC1110
R4
1k
1 VCC
REFOUT 14
C4
0.022
+
C7 C8,9
C10,11
Vin 2.5V
1.0
2 x 10uF
2 x 560uF
_
2 SS/ENBL
3 OCSET
4 PWRGD
REFIN 13
SENSE 12
COMP 11
R5
1k
C5
R6 0.047
4.7k
5 GND
6 PHASE
7 DL
BSTL 10
BSTH 9
DH 8
D1
MBRM120
R7
2.2
R8
2.2
Q1
Si9426DY
Q2
Si9426DY
C6
1.0
L1
800 nH
C12-14
C15-24
3 x 560uF 10 x 10uF
C10-14: Sanyo, 4SP560M
C8,9,15-24: TDK, CC3216AX5R0J106K
L1: Panasonic, ETQP6F0R8L or Falco, QPIP1205-809-3
Q1,Q2 options: Si9426DY, FDS6890A, IRF7401
D1: ON Semi (Motorola)
+
Vout = 1.25V @ 7A
_
1
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
1 page  
SINK AND SOURCE DC/DC CONTROLLER FOR SC1110
TERMINATION POWER SUPPLY APPLICATIONS
PRELIMINARY - October 9, 2000
THEORY OF OPERATION
Synchronous Buck Converter
VTERMINATION power is provided by a synchronous,
voltage-mode pulse width modulated (PWM) controller.
This section has all the features required to build a
high efficiency synchronous buck converter for termi-
nation of power application.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
resistive divider generates reference voltage for the
error amplifier from an external chipset voltage which
is usually 2.5V. The inverting input of the error amplifier
receives its voltage from the SENSE pin.
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the oscillation
frequency to 250kHz. The triangular output of the os-
cillator sets the reference voltage at the inverting input
of the PWM comparator. The non-inverting input of the
comparator receives it’s input voltage from the error
amplifier. When the oscillator output voltage drops be-
low the error amplifier output voltage, the comparator
output goes high. This pulls DL low, turning off the low-
side FET, and DH is pulled high, turning on the high-
side FET (once the cross-current control allows it).
When the oscillator voltage rises back above the error
amplifier output voltage, the comparator output goes
low. This pulls DH low, turning off the high-side FET,
and DL is pulled high, turning on the low-side FET
(once the cross-current control allows it).
As SENSE increases, the output voltage of the error
amplifier decreases. This causes a reduction in the on-
time of the high-side MOSFET connected to DH,
hence lowering the output voltage.
Under Voltage Lockout
The under voltage lockout circuit of the SC1110 as-
sures that both the high-side MOSFET driver outputs
remain in the off state whenever the supply voltage
drops below set parameters. Lockout occurs if VCC falls
below 4.0V. Normal operation resumes once VCC rises
above 4.2V.
Soft Start
Initially, SS/ENABLE sources 10µA of current to
charge an external capacitor. The outputs of the error
amplifiers are clamped to a voltage proportional to the
voltage on SS/ENABLE. This limits the on-time of the
high-side MOSFETs, thus leading to a controlled ramp-
up of the output voltages.
RDS(ON) Current Limiting
The current limit threshold is set by connecting an ex-
ternal resistor from the VCC supply to OCSET. The volt-
age drop across this resistor is due to the 200µA inter-
nal sink sets the voltage at the pin. This voltage is
compared to the voltage at the PHASE node. This
comparison is made only when the high-side drive is
high to avoid false current limit triggering due to uncon-
tributing measurements from the MOSFET’s off-
voltage. When the voltage at PHASE is less than the
voltage at OCSET, an overcurrent condition occurs
and the soft start cycle is initiated. The synchronous
switcher turns off and SS/ENABLE starts to sink 2µA.
When SS/ENABLE reaches 0.8V, it then starts to
source 10µA and a new cycle begins.
Hiccup Mode
During power up, the SS/ENABLE pin is internally
pulled low until VCC reaches the undervoltage lockout
level of 4.2V. Once VCC has reached 4.2V, the SS/EN-
ABLE pin is released and begins to source 10µA of
current to the external soft-start capacitor. As the soft-
start voltage rises, the output of the internal error am-
plifier is clamped to this voltage. When the error signal
reaches the level of the internal triangular oscillator,
which swings from 1V to 2V at a fixed frequency of 250
kHz, switching occurs. As the error signal crosses
over the oscillator signal, the duty cycle of the PWM
signal continues to increase until the output comes into
regulation. If an over-current condition has not oc-
curred the soft-start voltage will continue to rise and
level off at about 2.2V.
An over-current condition occurs when the high-side
drive is turned on, but the PHASE node does not
reach the voltage level set at the OCSET pin. The
PHASE node is sampled only once per cycle during the
valley of the triangular oscillator. Once an over-current
occurs, both the high-side and low-side drivers turn off
and the SS/ENABLE pin begins to sink 2uA. The soft-
start voltage will begin to decrease as the 2uA of cur-
rent discharges the external capacitor. When the soft-
start voltage reaches 0.8V, the SS/ENABLE pin will be-
gin to source 10uA and begin to charge the external
capacitor causing the soft-start voltage to rise again.
Again, when the soft-start voltage reaches the level of
the internal oscillator, switching will occur.
If the over-current condition is no longer present, nor-
mal operation will continue. If the over-current condi-
tion is still present, the SS/ENABLE pin will again begin
to sink 2uA. This cycle will continue indefinitely until
the over-current condition is removed.
© 2000 SEMTECH CORP.
5
652 MITCHELL ROAD NEWBURY PARK CA 91320
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SC111.PDF ] | |
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