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AT91M43300-12CC-1.8 데이터시트 PDF




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기능 ARM Thumb Microcontrollers
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AT91M43300-12CC-1.8 데이터시트, 핀배열, 회로
Features
Utilizes the ARM7TDMIARM® Thumb® Processor Core
High-performance 32-bit RISC Architecture
High-density 16-bit Instruction Set
Leader in MIPS/Watt
Embedded ICE (In-Circuit Emulation)
3K Bytes Internal RAM
Fully-programmable External Bus Interface (EBI)
Maximum External Address Space of 64M Bytes
Up to 8 Chip Selects
Software-programmable 8/16-bit External Data Bus
8-channel Peripheral Data Controller
8-level Priority, Individually-maskable, Vectored Interrupt Controller
5 External Interrupts, including a High-priority, Low-latency Interrupt Request
58 Programmable I/O Lines
6-channel 16-bit Timer/Counter
6 External Clock Inputs
2 Multi-purpose I/O Pins per Channel
3 USARTs
2 Dedicated Peripheral Data Controller (PDC) Channels per USART
Support for up to 9-bit Data Transfers
Master/Slave SPI Interface
2 Dedicated Peripheral Data Controller (PDC) Channels
8- to 16-bit Programmable Data Length
4 External Slave Chip Selects
Programmable Watchdog Timer
Power Management Controller (PMC)
CPU and Peripherals can be Deactivated Individually
IEEE 1149.1 JTAG Boundary Scan on all Active Pins
Fully Static Operation: 0 Hz to 25 MHz (12 MHz @ 1.8V)
1.8V to 3.6V Core Operating Voltage Range
2.7V to 5.5V I/O Operating Voltage Range
-40° to +85°C Operating Temperature Range
Available in a 144-ball PBGA Package
Description
The AT91M43300 is a member of the Atmel AT91 16/32-bit Microcontroller family,
which is based on the ARM7TDMI processor core.
This processor has a high-performance 32-bit RISC architecture with a high-density
16-bit instruction set and features very low power consumption. In addition, a large
number of internally banked registers result in very fast exception handling, making
the device ideal for real-time control applications. The AT91 ARM-based MCU family
also features Atmels high-density, in-system programmable, nonvolatile memory
technology.
The AT91M43300 has a direct connection to off-chip memory, including Flash,
through the fully-programmable External Bus Interface.
The AT91M43300 is manufactured using Atmels high-density CMOS technology. By
combining the ARM7TDMI microcontroller core with an on-chip SRAM, and a wide
range of peripheral functions on a monolithic chip, the AT91M43300 provides a highly-
flexible and cost-effective solution to many compute-intensive multi-processor appli-
cations.
The compact BGA package reduces required board space to an absolute minimum.
AT91
ARM® Thumb®
Microcontrollers
AT91M43300
Rev. 1322A10/99
1




AT91M43300-12CC-1.8 pdf, 반도체, 판매, 대치품
Architectural Overview
The AT91M43300 architecture consists of two main buses,
the Advanced System Bus (ASB) and the Advanced
Peripheral Bus (APB). The ASB is designed for maximum
performance. It interfaces the processor with the on-chip
32-bit memories and the external memories and devices by
means of the External Bus Interface (EBI). The APB is
designed for accesses to on-chip peripherals and is opti-
mized for low power consumption. The AMBA Bridge pro-
vides an interface between the ASB and the APB.
An on-chip Peripheral Data Controller (PDC) transfers data
between the on-chip USARTs/SPI and the on- and off-chip
memories without processor intervention. Most importantly,
the PDC removes the processor interrupt handling over-
head and significantly reduces the number of clock cycles
required for a data transfer. It can transfer up to 64K contig-
uous bytes without reprogramming the starting address. As
a result, the performance of the microcontroller is
increased and the power consumption reduced.
The AT91M43300 peripherals are designed to be easily
programmable with a minimum number of instructions.
Each peripheral has a 16K-byte address space allocated in
the upper 3M bytes of the 4G byte address space. Except
for the interrupt controller, the peripheral base address is
the lowest address of its memory space. The peripheral
register set is composed of control, mode, data, status and
interrupt registers.
To maximize the efficiency of bit manipulation, frequently-
written registers are mapped into three memory locations.
The first address is used to set the individual register bits,
the second resets the bits and the third address reads the
value stored in the register. A bit can be set or reset by writ-
ing a one to the corresponding position at the appropriate
address. Writing a zero has no effect. Individual bits can
thus be modified without having to use costly read-modify-
write and complex bit manipulation instructions.
All of the external signals of the on-chip peripherals are
under the control of the Parallel I/O controller. The PIO
controller can be programmed to insert an input filter on
each pin or generate an interrupt on a signal change. After
reset, the user must carefully program the PIO Controller in
order to define which peripheral signals are connected with
off-chip logic.
The ARM7TDMI processor operates in little-endian mode
in the AT91M43300 microcontroller. The processors inter-
nal architecture and the ARM and Thumb instruction sets
are described in the ARM7TDMI datasheet. The memory
map and the on-chip peripherals are described in the
datasheet entitled AT91M63200 Datasheet(Literature
No. 1028). Electrical characteristics for the AT91M43300
are documented in the datasheet AT91M63200 Electrical
and Mechanical Characteristics(Literature No. 1090).
The ARM standard In-Circuit Emulation debug interface is
supported via the ICE port of the AT91M43300 via the
JTAG/ICE port when JTAGSEL is low. IEEE JTAG bound-
ary scan is supported via the JTAG/ICE port when JTAG-
SEL is high.
PDC: Peripheral Data Controller
The AT91M43300 has an 8-channel PDC dedicated to the
three on-chip USARTs and to the SPI. One PDC channel is
connected to the receiving channel and one to the transmit-
ting channel of each peripheral.
The user interface of a PDC channel is integrated in the
memory space of each USART channel and in the memory
space of the SPI. It contains a 32-bit address pointer regis-
ter and a 16-bit count register. When the programmed data
is transferred, an end-of-transfer interrupt is generated by
the corresponding peripheral. See the USART section and
the SPI section for more details on PDC operation and pro-
gramming.
Power Supplies
The AT91M43300 has two kinds of power supply pins:
VDDCORE pins, which power the chip core
VDDIO pins, which power the I/O lines
This allows core power consumption to be reduced by sup-
plying it with a lower voltage than the I/O lines. The
VDDCORE pins must never be powered at a voltage
greater than the supply voltage applied to the VDDIO pins.
Typical supported voltage combinations are shown in the
following table:
Pins
VDDCORE
VDDIO
Typical Supply Voltages
3.0V or 3.3V 3.0V or 3.3V
2.0V
5.0V
3.0V or 3.3V 3.0V or 3.3V
4 AT91M43300

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AT91M43300-12CC-1.8 전자부품, 판매, 대치품
AT91M43300
WD: Watchdog Timer
The AT91M43300 features an internal Watchdog Timer
that can be used to guard against system lock-up if the
software becomes trapped in a deadlock.
PMC: Power Management Controller
The Power Management Controller allows optimization of
power consumption. The PMC enables/disables the clock
inputs to most of the peripherals as well as to the ARM pro-
cessor core.
When the ARM core clock is disabled, the current instruc-
tion is processed before the clock is stopped. The clock
can be re-enabled by any enabled interrupt or by a hard-
ware reset.
When a peripheral clock is disabled, the clock is immedi-
ately stopped. When the clock is re-enabled, the peripheral
resumes action where it left off.
Due to the static nature of the design, the contents of the
on-chip RAM and registers for which the clocks are dis-
abled remain unchanged.
SF: Special Function
The AT91M43300 provides registers that implement the
following special functions:
Chip identification
RESET status
Ordering Information
Max Speed Core Operating
(MHz)
Voltage
I/O Operating
Voltage
25
2.7V to 3.6V
2.7V to 5.5V
Ordering Code
AT91M43300-25CC
AT91M43300-25CI
AT91M43300-12CC-1.8
12
1.8V to 3.6V
2.7V to 3.6V
AT91M43300-12CI-1.8
RAM
(bytes)
3K
Package
BGA 144
Operating
Temperature
Range
Commercial
(0°C to 70°C)
Industrial
(-40°C to 85°C)
Commercial
(0°C to 70°C)
Industrial
(-40°C to 85°C)
7

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AT91M43300-12CC-1.8

ARM Thumb Microcontrollers

ATMEL Corporation
ATMEL Corporation
AT91M43300-12CC-1.8

ARM Thumb Microcontrollers

ATMEL Corporation
ATMEL Corporation

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