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XM28C020I-15 데이터시트 PDF




Xicor Inc.에서 제조한 전자 부품 XM28C020I-15은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 XM28C020I-15 자료 제공

부품번호 XM28C020I-15 기능
기능 5 Volt/ Byte Alterable E2PROM
제조업체 Xicor Inc.
로고 Xicor Inc. 로고


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XM28C020I-15 데이터시트, 핀배열, 회로
XM28C020
2 Megabit Module
XM28C020
5 Volt, Byte Alterable E2PROM
256K x 8 Bit
TYPICAL FEATURES
High Density 2 Megabit (256K x 8) Module
Access Time of 150ns at –55°C to +125°C
Base Memory Component: Xicor X28C513
Pinout conforms to JEDEC Standard for
2 Megabit E2PROM
Fast Write Cycle Times
—128 Byte Page Write
—Byte or Page Write Cycle: 5ms Typical
—Complete Memory Rewrite: 10 Seconds
Early End of Write Detection
DATA Polling
—Toggle Bit Polling
Software Data Protection
Three Temperature Ranges
—Commercial: 0°C to +75°C
—Industrial: –40° to +85°C
—Military: –55° to +125°C
High Rel Module
—100% MIL-STD-883 Compliant Components
Endurance: 100,000 Cycles
FUNCTIONAL DIAGRAM
X28C513
A0–A15
I/O0–I/O7
OE
WE
CE
A0–A15
I/O0–I/O7
OE
WE
CE
A16
A17
X28C513
A0–A15
I/O0–I/O7
OE
WE
CE
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3872-1.9 6/18/97 T1/C0/D0 SH
DESCRIPTION
The XM28C020 is a high density 2 Megabit E2PROM
comprised of four X28C513 LCCs mounted on a co-fired
multilayered ceramic substrate. Individual components
are 100% tested prior to assembly in module form and
then 100% tested after assembly.
The XM28C020 is configured 256K x 8 bit. The module
supports a 128-byte page write operation. This com-
bined with DATA Polling or Toggle Bit Polling, effectively
provides a 39µs/byte write cycle, enabling the entire
array to be rewritten in 10 seconds.
The XM28C020 provides the same high endurance and
data retention as the X28C513.
X28C513
A0–A15
I/O0–I/O7
OE
WE
CE
X28C513
A0–A15
I/O0–I/O7
OE
WE
CE
PIN CONFIGURATION
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1 32
2 31
3 30
4 29
5 28
6 27
7 26
8 25
XM28C020
9 24
10 23
11 22
12 21
13 20
14 19
15 18
16 17
VCC
WE
A17
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/04
I/O3
3872 FHD F01
1
3872 FHD F02
Characteristics subject to change without notice




XM28C020I-15 pdf, 반도체, 판매, 대치품
XM28C020
DATA POLLING I/O7
Figure 2. DATA Polling Bus Sequence
LAST
WE WRITE
CE
OE
VIH
I/O7
A0–A17
An
HIGH Z
VOL
An An
An
An
VOH
READY
An An
3872 FHD F10
Figure 3. DATA Polling Software Flow
WRITE DATA
DATA Polling can effectively halve the time for writing to
the XM28C020. The timing diagram in Figure 2 illus-
trates the sequence of events on the bus. The software
flow diagram in Figure 3 illustrates one method of
implementing the routine.
WRITES
COMPLETE?
NO
YES
SAVE LAST DATA
AND ADDRESS
READ LAST
ADDRESS
IO7
COMPARE?
YES
NO
READY
3872 FHD F11
4

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XM28C020I-15 전자부품, 판매, 대치품
XM28C020
SOFTWARE DATA PROTECTION
Figure 6. Timing Sequence—Byte or Page Write
VCC
0V
DATA
ADDR.
A0–A15*
CE
AA
5555
55
2AAA
WE
A0
5555
tBLC MAX
*A16 & A17 select one of four devices on the module.
WRITES
OK
BYTE
OR
PAGE
tWC
(VCC)
WRITE
PROTECTED
3872 FHD F14
Figure 7. Write Sequence for
Software Data Protection
WRITE DATA AA
TO ADDRESS
5555
WRITE DATA 55
TO ADDRESS
2AAA
Regardless of whether the device has previously been
protected or not, once the software data protected
algorithm is used and data has been written, the device
will automatically disable further writes unless another
command is issued to cancel it. If no further commands
are issued the device will be write protected during
power-down and after any subsequent power-up.
WRITE DATA A0
TO ADDRESS
5555
WRITE DATA XX
TO ANY
ADDRESS
BYTE/PAGE
LOAD ENABLED
WRITE LAST
BYTE TO
LAST ADDRESS
AFTER tWC
RE-ENTERS DATA
PROTECTED STATE
3872 FHD F15
7

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