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XR16C2850IM 데이터시트 PDF




Exar Corporation에서 제조한 전자 부품 XR16C2850IM은 전자 산업 및 응용 분야에서
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부품번호 XR16C2850IM 기능
기능 DUAL UART WITH 128-byte FIFOs AND RS-485 HALF DUPLEX CONTROL
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XR16C2850IM 데이터시트, 핀배열, 회로
Preliminary
Information
XR16C2850
DUAL UART WITH 128-byte FIFO’s AND
RS-485 HALF DUPLEX CONTROL
DESCRIPTION
The XR16C2850 (2850) is a dual universal asynchronous receiver and transmitter (UART). The 2850 provides
enhanced UART functions with 128 byte FIFO, automatic RS-485 half duplex control, a modem control interface,
and data rates up to 1.5 Mbps. Onboard status registers provide the user with error indications and operational
status. System interrupts and modem control features may be tailored by external software to meet specific user
requirements. An internal loopback capability allows onboard diagnostics. Independent programmable baud rate
generators are provided to select transmit and receive clock rates up to 1.5 Mbps. The baud rate generator can
be configured for either crystal or external clock input. The 2850 is available in a 40-pin PDIP, 44-pin PLCC, and
48-pin TQFP packages. The 40 pin package does not offer TXRDY and RXRDY pins (DMA Signal monitoring).
Otherwise the three package versions are the same. The 2850 is functionally compatible with the ST16C2550.
The 2850 is fabricated in an advanced CMOS process to achieve low drain power and high speed requirements.
FEATURES
Pin and functionally compatible to ST16C2550,
software compatible with INS8250, NS16C550
1.5 Mbps transmit/receive operation (24 MHz
Max.).
128 byte transmit FIFO to reduce bandwidth re-
quirement of the external CPU.
128 byte receive FIFO with error flags to reduce
bandwidth requirement of the external CPU.
Independent transmit and receive UART control.
RS-485 half duplex control.
Programmable transmit/receive FIFO trigger lev-
els.
Hardware / software flow control.
Selectable RTS flow control hysterisis.
Modem control signals (-CTS, -RTS, -DSR, -DTR,
-RI, -CD, and software controllable line break).
Programmable character lengths (5, 6, 7, 8) with
even, odd, or no parity.
Infrared receive and transmit encoder/decoder.
Device identification.
Crystal or external clock input.
460.8 Kbps transmit/receive operation with 7.3728
MHz crystal or external clock source.
D5 7
D6 8
D7 9
RXB 10
RXA 11
-TXRDYB 12
TXA 13
TXB 14
-OPB 15
-CSA 16
-CSB 17
PLCC Package
XR16C2850CJ
39 RESET
38 -DTRB
37 -DTRA
36 -RTSA
35 -OPA
34 -RXRDYA
33 INTA
32 INTB
31 A0
30 A1
29 A2
ORDERING INFORMATION
Part number
XR16C2850CP
XR16C2850CJ
XR16C2850CM
Pins Package
40 PDIP
44 PLCC
48 TQFP
Operating temperature
0° C to + 70° C
0° C to + 70° C
0° C to + 70° C
Part number
XR16C2850IP
XR16C2850IJ
XR16C2850IM
Pins Package
40 PDIP
44 PLCC
48 TQFP
Operating temperature
-40° C to + 85° C
-40° C to + 85° C
-40° C to + 85° C
Rev. 1.00P
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017




XR16C2850IM pdf, 반도체, 판매, 대치품
XR16C2850
SYMBOL DESCRIPTION
Symbol
A0
A1
A2
-CS A-B
D0-D7
GND
INT A-B
-IOR
-IOW
Pin Signal
40 44 48 type
Pin Description
28 31 28
I Address-0 Select Bit. - Internal register address selection.
27 30 27
I Address-1 Select Bit. - Internal register address selection.
26 29 26
I Address-2 Select Bit. - Internal register address selection.
14,15 16,17 10,11 I Chip Select A, B (active low) - This function is associated
with individual channels, A through B. These pins enable
data transfers between the user CPU and the 2850 for the
channel(s) addressed. Individual UART sections (A, B) are
addressed by providing a logic 0 on the respective -CS A-
B pin.
1-8 2-9 44-48 I/O
1-3 Data Bus (Bi-directional) - These pins are the eight bit, three
state data bus for transferring information to or from the
controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.
20 22 17 Pwr Signal and power ground.
30,29 33,32 30,29 O Interrupt A, B (three state) - This function is associated with
individual channel interrupts, INT A-B. INT A-B are enabled
when MCR bit-3 is set to a logic 1, interrupts are enabled in
the interrupt enable register (IER), and when an interrupt
condition exists. Interrupt conditions include: receiver er-
rors, available receiver buffer data, transmit buffer empty,
or when a modem status flag is detected.
21 24 19
I Read strobe (active low strobe) - A logic 0 transition on this
pin will load the contents of an Internal register defined by
address bits A0-A2 onto the 2850 data bus (D0-D7) for
access by an external CPU.
18 20 15
I Write strobe (active low strobe) - A logic 0 transition on this
pin will transfer the contents of the data bus (D0-D7) from
the external CPU to an internal register that is defined by
address bits A0-A2.
Rev. 1.00P
4

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XR16C2850IM 전자부품, 판매, 대치품
XR16C2850
SYMBOL DESCRIPTION
Symbol
-RI A-B
-RTS A-B
RX A-B
TX A-B
-RSCTL
Pin Signal
40 44 48 type
Pin Description
pin has no effect on the UART’s transmit or receive opera-
tion.
39,23 43,26 41,21 I Ring Indicator (active low) - These inputs are associated
with individual UART channels, A through B. A logic 0 on
this pin indicates the modem has received a ringing signal
from the telephone line. A logic 1 transition on this input pin
will generate an interrupt.
32,24 36,27 33,22 O Request to Send (active low) - These outputs are associated
with individual UART channels, A through B. A logic 0 on the
-RTS pin indicates the transmitter has data ready and
waiting to send. Writing a logic 1 in the modem control
register (MCR bit-1) will set this pin to a logic 0 indicating
data is available. After a reset this pin will be set to a logic
1. This pin has no effect on the UART’s transmit or receive
operation.
10,9 11,10 5,4
I Receive Data (A-B) - These inputs are associated with
individual serial channel data to the 2850 receive input
circuits, A-B. The RX signal will be a logic 1 during reset, idle
(no data), or when the transmitter is disabled. During the
local loopback mode, the RX input pin is disabled and TX
data is connected to the UART RX Input, internally.
11,12 13,14 7,8
O Transmit Data (A-B) - These outputs are associated with
individual serial transmit channel data from the 2850. The
TX signal will be a logic 1 during reset, idle (no data), or when
the transmitter is disabled. During the local loopback mode,
the TX output pin is disabled and TX data is internally
connected to the UART RX Input.
- - 37 I RS-485 function select. When this pin is pulled high, normal
-RTS function is selected. RS-485 direction control can be
activated by connecting this pin to GND. This pin is wired
“Or-ed” with FCTR Bit-3.
Rev. 1.00P
7

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