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PDF YMF753 Data sheet ( Hoja de datos )
| Número de pieza | YMF753 | |
| Descripción | AC97 Revision2.2 Audio CODEC with Digital Audio I/F | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de YMF753 (archivo pdf) en la parte inferior de esta página. Total 26 Páginas | ||
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YMF753
AC’97 Revision2.2 Audio CODEC
with Digital Audio I/F
OVERVIEW
YMF753 is an AC’97 Audio CODEC LSI, which is fully compliant with the industry standard “Audio
CODEC ’97” component specification (Revision 2.2).
Different from former AC’97, YMF753 supports new features like SPDIF OUT and Zoomed Video Port.
Without using a digital controller, these new features can be enhanced in the AC’97 sound system that has an
ICH controller built-in chipset.
Low power consumption is supported not only in the normal mode but can be controlled in the power-down
mode.
FEATURES
• AC’97 Revision 2.2 Compliant
• Exceeds PC99 / PC2001 Analog Performance Requirement
(Mobile PC Audio Performance Compliant when analog low power supply is used.)
• Analog Inputs :
- 4 Stereo Inputs: LINE, CD, VIDEO, AUX
- 2 Monaural Inputs: Speakerphone and PC BEEP Inputs
- 2 Independent Microphone Inputs
• PC BEEP can directly output to Line Out
• Internal +20dB amplifier circuitry for microphone
• Analog Outputs : Stereo LINE Output, True LINE Level and Monaural Output
• Supports Zoomed Video Port
• Supports Consumer IEC958 Output Port (SPDIF OUT)
• SPDIF Output for AC’97 Revision 1.0 Compliant
• Different audio data from AC-Link can be output to SPDIF and Line Out
• Supports 3D Enhancement (Wide Stereo), and Bass / Treble control
• Multiple CODEC Capability
• Programmable Power Down Mode
• Supports EAPD (External Amplifier Power Down)
• Power Supplies : Analog 4.3V to 5.0V, Digital 3.3V or 5.0V
• 48-Pin SQFP Package (YMF753-S)
YAMAHA CORPORATION
YMDF7e5c3eCmATbAeLO3G, 1998
CATALOG No.:LSI-4MF753A2
March 6, 2001
1 page  
YMF753
BLOCK DIAGRAM
RESET#
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
AC’97
digital
I/F
UDS
VREF
A/D
A/D
LPBK
PCM L
32step
PCM R
32step
ZV L
32step
ZV R
32step
Record R
16step
Record L
16step
EAPD (DIT)
Reserved / ID0#
EXT24M / ID1#
ZV_LR / DIT
ZV_SIN
/ Reserved
ZV_BCK / DIT
MSEL
XTL_IN
XTL_OUT
TX-7
DIT
ID0#
ID1#
DIT
ZV_LR
ZV_SIN
ZV_BCK
EXT24M
ZV
Port
POP
PHONE
32step
AUX
32step
VIDEO
32step
CD
32step
LINE
32step
MIC
32step
PC Beep
16step
Right
Left
3D
tone
0dB/
+20dB
MS
CD Right
CD Left
BUF
MIC1
MIC2
LINE_IN_R
LINE_IN_L
CD_R
CD_GND
CD_L
VIDEO_R
VIDEO_L
AUX_R
AUX_L
PHONE
MIX
Monaural
32step
Master L
32step
Master R
32step
RESET#
MONO_OUT
PC_BEEP
LINE_OUT_L
LINE_OUT_R
LNLVL_OUT_L
LNLVL_OUT_R
5 March 6, 2001
5 Page 
YMF753
26h : Power Down (Read/Write, Default: 000xh)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
EAPD - PR5 PR4 PR3 PR2 PR1 PR0 - - - - REF ANL DAC ADC
EAPD............This bit controls the state of EAPD (No.47) pin.
“0” : Low
“1” : High
PR5 ...............This bit controls the power state of the clock oscillation circuit.
“0” : Normal
“1” : Power down
PR4 ...............This bit controls the power state of the AC-Link.
“0” : Normal
“1” : Power down
PR3 ...............This bit controls the power state of the analog mixer.
“0” : Normal
“1” : Power down (Vref off)
PR2 ...............This bit controls the power state of the analog mixer.
“0” : Normal
“1” : Power down (Vref still on)
PR1 ...............This bit controls the power state of the D/A converter.
“0” : Normal
“1” : Power down
PR0 ...............This bit controls the power state of the A/D converter.
“0” : Normal
“1” : Power down
REF...............This bit is Read Only, and indicates the state of Vref.
“0” : Ground level
“1” : Reference voltage
ANL..............This bit is Read Only, and indicates the state of the analog mixer.
“0” : The analog mixer does not work.
“1” : The analog mixer works normally.
DAC..............This bit is Read Only, and indicates the state of the D/A converter.
“0” : The D/A converter does not work.
“1” : The D/A converter works normally.
ADC..............This bit is Read Only, and indicates the state of the A/D converter.
“0” : The A/D converter does not work.
“1” : The A/D converter works normally.
Note) When YMF753 is the Secondary CODEC, and both PR5 and PR4 are set to “1”, these bits are not
cleared by Warm Reset.
11 March 6, 2001
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet YMF753.PDF ] | |
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