Datasheet.kr   

ZL30402 데이터시트 PDF




Zarlink Semiconductor Inc에서 제조한 전자 부품 ZL30402은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 ZL30402 자료 제공

부품번호 ZL30402 기능
기능 SONET/SDH Network Element PLL
제조업체 Zarlink Semiconductor Inc
로고 Zarlink Semiconductor Inc 로고


ZL30402 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 30 페이지수

미리보기를 사용할 수 없습니다

ZL30402 데이터시트, 핀배열, 회로
ZL30402
SONET/SDH Network Element PLL
Features
• Meets requirements of GR-253 for SONET
stratum 3 and SONET Minimum Clocks (SMC)
• Meets requirements of GR-1244 for stratum 3
• Meets requirements of G.813 Option 1 and 2 for
SDH Equipment Clocks (SEC)
• Generates clocks for ST-BUS, DS1, DS2, DS3,
OC-3, E1, E2, E3, STM-1 and 19.44 MHz
• Holdover accuracy to 1x10 -12 meets GR-1244
Stratum 3E and ITU-T G.812 requirements
• Continuously monitors Primary and Secondary
reference clocks
• Provides “hit-less” reference switching
• Compensates for Master Clock Oscillator
accuracy
• Detects frequency of both reference clocks and
synchronizes to any combination of 8 kHz,
1.544 MHz, 2.048 MHz and 19.44 MHz reference
frequencies.
• Allows Hardware or Microprocessor control
• Pin compatible with MT90401 device.
Applications
• Synchronization for SDH and SONET Network
Elements
• Clock generation for ST-BUS and GCI
backplanes
Data Sheet
November 2004
Ordering Information
ZL30402/QCC 80 Pin LQFP Trays
ZL30402QCC1 80 Pin LQFP* Trays
*Pb Free Matte Tin
-40°C to +85°C
Description
The ZL30402 is a Network Element Phase-Locked
Loop designed to synchronize SDH and SONET
systems. In addition, it generates multiple clocks for
legacy PDH equipment and provides timing for ST-BUS
and GCI backplanes.
The ZL30402 operates in NORMAL (LOCKED),
HOLDOVER and FREE-RUN modes to ensure that in
the presence of jitter, wander and interruptions to the
reference signals, the generated clocks meet
international standards. The filtering characteristics of
the PLL are hardware or software selectable and they
do not require any external adjustable components.
The ZL30402 uses an external 20 MHz Master Clock
Oscillator to provide a stable timing source for the
HOLDOVER operation.
The ZL30402 operates from a single 3.3 V power
supply and offers a 5 V tolerant microprocessor
interface.
VDD GND
C20i
FCS
PRI
SEC
RefSel
HW
RESET
Primary
Acquisition
PLL
Secondary
Acquisition
PLL
Master Clock
Frequency
Calibration
MUX
Microport
Core PLL
APLL
Clock
Synthesizer
Control State Machine
JTAG
IEEE
1149.1a
CS DS R/W A0-A6 D0-D7
MS1 MS2 RefAlign LOCK HOLDOVER
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved.
C155P/N
C34/C44
C19o
C16o
C8o
C6o
C4o
C2o
C1.5o
F16o
F8o
F0o
E3DS3/OC3
E3/DS3
Tclk
Tdi
Tdo
Tms
Trst




ZL30402 pdf, 반도체, 판매, 대치품
ZL30402
Data Sheet
Pin Description
Pin #
1
2-5
Name
IC
A1-A4
6 GND
7-8 A5-A6
9 FCS
10 VDD
11 GND
12 F16o
13 C16o
14 C8o
15 C4o
16 C2o
17 F0o
18 MS1
19 MS2
Description
Internal Connection. Leave unconnected.
Address 1 to 4 (5 V tolerant input). Address inputs for the parallel processor
interface. Connect to ground in Hardware Control.
Ground. Negative power supply.
Address 5 to 6 (5 V tolerant input). Address inputs for the parallel processor
interface. Connect to ground in Hardware Control.
Filter Characteristic Select (Input). In Hardware Control, FCS selects the
filtering characteristics of the ZL30402. Set this pin high to have a loop filter
corner frequency of 0.1 Hz and limit the phase slope to 885 ns per second. Set
this pin low to have corner frequency of 1.1Hz and limit the phase slope to
41 ns per 1.326 ms. Connect to ground in Software Control. This pin is
internally pulled down to GND.
Positive Power Supply.
Ground.
Frame Pulse ST-BUS 8.192 Mb/s (CMOS tristate output). This is an 8 kHz,
61 ns wide, active low framing pulse, which marks beginning of a ST-BUS
frame. This frame pulse is typically used for ST-BUS operation at 8.192 Mb/s
Clock 16.384 MHz (CMOS tristate output). This clock is used for ST-BUS
operation at 8.192 Mb/s.
Clock 8.192 MHz (CMOS tristate output). This clock is used for ST-BUS
operation at 8.192 Mb/s.
Clock 4.096 MHz (CMOS tristate output). This clock is used for ST-BUS
operation at 2.048 Mb/s.
Clock 2.048 MHz (CMOS tristate output). This clock is used for ST-BUS
operation at 2.048 Mb/s.
Frame Pulse ST-BUS 2.048 Mb/s (CMOS tristate output). This is an 8 kHz,
244 ns, active low framing pulse, which marks the beginning of a ST-BUS
frame. This is typically used for ST-BUS operation at 2.048 Mb/s and
4.096 Mb/s.
Mode Select 1 (Input). The MS1 and MS2 pins select the ZL30402 mode of
operation (Normal, Holdover or Free-run), see Table 1 on page 15 for details.
The logic level at this input is sampled by the rising edge of the F8o frame
pulse. Connect to ground in Software Control.
Mode Select 2 (Input). The MS2 and MS1 pins select the ZL30402 mode of
operation (Normal, Holdover or Free-run), see Table 1 on page 15 for details.
The logic level at this input is sampled by the rising edge of the F8o frame
pulse. Connect to ground in Software Control.
4
Zarlink Semiconductor Inc.

4페이지










ZL30402 전자부품, 판매, 대치품
ZL30402
Data Sheet
Pin Description (continued)
Pin #
Name
Description
53
C34/C44
Clock 34.368 MHz / clock 44.736 MHz (CMOS Output). This clock is
programmable to be either 34.368 MHz (for E3 applications) or 44.736 MHz
(for DS3 applications) when E3DS3/OC3 is high, or to be either 8.592MHz or
11.184 MHz when E3DS3/OC3 is low. See description of E3DS3/OC3 and
E3/DS3 inputs for details. In Software Control the functionality of this output is
controlled by Control Register 2 (Table 7 "Control Register 2 (R/W)").
54
VDD
Positive Power Supply.
55 HOLDOVER Holdover Indicator (CMOS output). Logic high at this output indicates that the
device is in Holdover mode.
56 NC No internal bonding Connection. Leave unconnected.
57
LOCK
Lock Indicator (CMOS output). Logic high at this output indicates that
ZL30402 is locked to the input reference.
58 NC No internal bonding Connection. Leave unconnected.
59 DS Data Strobe (5 V tolerant input). This input is the active low data strobe of the
processor interface.
60 IC Internal Connection. Connect to ground.
61 IC Internal Connection. Leave unconnected.
62 OE Output Enable (Input). Logic high on this input enables C19, F16, C16, C8,
C6, C4, C2, C1.5, F8 and F0 signals. Pulling this input low will force the output
clocks pins into a high impedance state.
63 CS Chip Select (5 V tolerant input). This active low input enables the
microprocessor interface. When CS is set to high, the microprocessor interface
is idle and all Data Bus I/O pins will be in a high impedance state.
64
RESET
RESET (5 V tolerant input). This active low input forces the ZL30402 into a
RESET state. The RESET pin must be held low for a minimum of 1µs to reset
the device properly. The ZL30402 must be reset after power-up.
65 HW Hardware/Software Control (Input). If this pin it tied low, the ZL30402 is
controlled via the microport. If it is tied high, the ZL30402 is controlled via the
control pins MS1, MS2, FCS, RefSel, RefAlign, E3/DS3 and E3DS3/OC3.
66-69
D0 - D3
Data 0 to Data 3 (5 V tolerant three-state I/O). These signals combined with
D4 - D7 form the bi-directional data bus of the microprocessor interface (D0 is
the least significant bit).
70
GND
Ground.
71 IC Internal Connection (Input). Connect this pin to ground.
72 IC Internal Connection (Input). Connect this pin to ground.
73
VDD
Positive Power Supply.
7
Zarlink Semiconductor Inc.

7페이지


구       성 총 30 페이지수
다운로드[ ZL30402.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
ZL30402

SONET/SDH Network Element PLL

Zarlink Semiconductor Inc
Zarlink Semiconductor Inc
ZL30406

SONET/SDH Clock Multiplier PLL

Zarlink
Zarlink

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵