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X9221USM 데이터시트 PDF




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부품번호 X9221USM 기능
기능 Dual E2POT Nonvolatile Digital Potentiometer
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X9221USM 데이터시트, 핀배열, 회로
APPLICATION NOTES
AVA I L A B L E
AN20 • AN42 • AN44–48 • AN50 • AN52 • AN53 • AN73
XATed9vr2ma2n1icneaIlnVfoormltaatgioen±5V, 64 Taps
X9221
Dual E2POTNonvolatile Digital Potentiometer
FEATURES
Two E2POTs in One Package
Two-Wire Serial Interface
Register Oriented Format
—Directly Write Wiper Position
—Read Wiper Position
—Store as Many as Four Positions per Pot
Instruction Format
—Quick Transfer of Register Contents to
Resistor Array
Low Power CMOS
Direct Write Cell
—Endurance - 100,000 Writes per Register
—Register Data Retention - 100 years
8 Bytes of E2PROM memory
3 Resistor Array Values
—2Kto 50KMask Programmable
Resolution: 64 Taps each Pot
20-Lead Plastic DIP and 20-Lead SOIC Packages
DESCRIPTION
The X9221 integrates two nonvolatile E2POT™ digitally
controlled potentiometers on a monolithic CMOS micro-
circuit.
The X9221 contains two resistor arrays, each com-
posed of 63 resistive elements. Between each element
and at either end are tap points accessible to the wiper
elements. The position of the wiper element on the array
is controlled by the user through the two-wire serial bus
interface.
Each resistor array has associated with it a wiper counter
register and four 8-bit data registers that can be directly
written and read by the user. The contents of the wiper
counter register control the position of the wiper on the
resistor array.
The data register may be read or written by the user. The
contents of the data registers can be transferred to the
wiper counter register to position the wiper. The current
wiper position can be transferred to any one of its
associated data registers.
FUNCTIONAL DIAGRAM
SCL
SDA
A0
A1
A2
A3
INTERFACE
AND
CONTROL
CIRCUITRY
8
DATA
R0 R1
WIPER
COUNTER
REGISTER
R2 R3 (WCR)
VH0
VL0
VW0
R0 R1 WIPER
COUNTER RESISTOR
REGISTER ARRAY
R2 R3 (WCR)
POT 1
VH1
VL1
VW1
3079 ILL F07.1
© Xicor, Inc. 1994, 1995, 1996 Patents Pending.
3079-1.6 6/12/96 T1/C1/D0 NS
1
Characteristics subject to change without notice




X9221USM pdf, 반도체, 판매, 대치품
X9221
Instruction Structure
The next byte sent to the X9221 contains the instruction
and register pointer information. The four most signifi-
cant bits are the instruction. The next four bits point to
one of two pots and when applicable they point to one of
four associated registers. The format is shown below in
Figure 2.
Figure 2. Instruction Byte Format
POTENTIOMETER
SELECT
I3 I2 I1 I0 0 P0 R1 R0
INSTRUCTIONS
REGISTER
SELECT
3079 ILL F09.1
The four high order bits define the instruction. The sixth
bit (P0) selects which one of the two potentiometers is
to be affected by the instruction. The last two bits (R1
and R0) select one of the four registers that is to be acted
upon when a register oriented instruction is issued.
Four of the nine instructions end with the transmission of
the instruction byte. The basic sequence is illustrated in
Figure 3. These two-byte instructions exchange data
between the WCR and one of the data registers. A
transfer from a data register to a WCR is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed tSTPWV. A transfer from WCR’s
Figure 3. Two-Byte Command Sequence
current wiper position to a data register is a write to
nonvolatile memory and takes a minimum of tWR to
complete. The transfer can occur between either poten-
tiometer and their associated registers or it may occur
between both of the potentiometers and one of their
associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9221; either between the host and one of
the data registers or directly between the host and the
WCR. These instructions are: Read WCR, read the
current wiper position of the selected pot; Write WCR,
change current wiper position of the selected pot; Read
Data Register, read the contents of the selected non-
volatile register; Write Data Register, write a new value
to the selected data register. The sequence of opera-
tions is shown in Figure 4.
The Increment/Decrement command is different from
the other commands. Once the command is issued and
the X9221 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in
one segment steps; thereby, providing a fine tuning
capability to the host. For each SCL clock pulse (tHIGH)
while SDA is HIGH, the selected wiper will move one
resistor segment towards the VH terminal. Similarly, for
each SCL clock pulse while SDA is LOW, the selected
wiper will move one resistor segment towards the VL
terminal. A detailed illustration of the sequence and
timing for this operation are shown in Figures 5 and 6
respectively.
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 0 P0 R1 R0 A S
T C CT
A K KO
RP
T
3079 ILL F10
4

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X9221USM 전자부품, 판매, 대치품
X9221
DETAILED OPERATION
Both E2POT potentiometers share the serial interface
and share a common architecture. Each potentiometer
is comprised of a resistor array, a wiper counter register
and four data registers. A detailed discussion of the
register organization and array operation follows.
Wiper Counter Register
The X9221 contains two wiper counter registers (WCR),
one for each E2POT potentiometer. The WCR can be
envisioned as a 6-bit parallel and serial load counter with
its outputs decoded to select one of sixty-four switches
along its resistor array. The contents of the WCR can be
altered in four ways: it may be written directly by the host
via the Write WCR instruction (serial load); it may be
written indirectly by transferring the contents of one of
four associated data registers via the XFR Data Register
instruction (parallel load); it can be modified one step at
a time by the Increment/ Decrement instruction; finally,
it is loaded with the contents of its data register zero (R0)
upon power-up.
Figure 8. Detailed Potentiometer Block Diagram
The WCR is a volatile register; that is, its contents are
lost when the X9221 is powered-down. Although the
register is automatically loaded with the value in R0
upon power-up, it should be noted this may be different
from the value present at power-down.
Data Registers
Each potentiometer has four nonvolatile data registers.
These can be read or written directly by the host and
data can be transferred between any of the four data
registers and the WCR. It should be noted all operations
changing data in one of these registers is a nonvolatile
operation and will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, these registers can be
used as regular memory locations that could possibly
store system parameters or user preference data.
SERIAL DATA PATH
FROM INTERFACE
CIRCUITRY
REGISTER 0
8
REGISTER 2
IF WCR = 00[H] THEN VW = VL
IF WCR = 3F[H] THEN VW = VH
REGISTER 1
SERIAL
BUS
INPUT
6
REGISTER 3
UP/DN
MODIFIED SCL
PARALLEL
BUS
INPUT
WIPER
COUNTER
REGISTER
INC/DEC
LOGIC
UP/DN
CLK
C
O
U
N
T
E
R
D
E
C
O
D
E
7
VH
VL
VW
3079 ILL F15

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