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X9530 데이터시트 PDF




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부품번호 X9530 기능
기능 Temperature Compensated Laser Diode Controller
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X9530 데이터시트, 핀배열, 회로
X9530
Temperature Compensated Laser Diode Controller
FEATURES
• Compatible with Popular Fiber Optic Module
Specifications such as Xenpak, SFF, SFP, and
GBIC
• Package
—14 Pin TSSOP
—15 Lead 2.7 x 3.5mm CSP (Chip-Scale
Package)
• Two Programmable Current Generators
—±1.6 mA max.
—8-bit (256 Step) Resolution
• Integrated 6 bit A/D Converter
• Temperature Compensation
—Internal or External Sensor
—–40°C to +100°C Range
—2.2°C / step resolution
—EEPROM Look-up Tables
• Hot Pluggable
• 2176-bit EEPROM
—17 Pages
—16 Bytes per Page
• Write Protection Circuitry
—Xicor BlockLock™
—Logic Controlled Protection
—2-wire Bus with 3 Slave Address Bits
• 3 V to 5.5 V, Single Supply Operation
LASER DIODE BIAS CONTROL APPLICATIONS
• SONET and SDH Transmission Systems
• 1G and 10G Ethernet, and Fibre Channel Laser
Diode Driver Circuits
TYPICAL APPLICATION
DESCRIPTION
The X9530 is a highly integrated laser diode bias
controller which incorporates two digitally controlled
Programmable Current Generators, temperature
compensation with dedicated look-up tables, and
supplementary EEPROM array. All functions of the
device are controlled via a 2-wire digital serial
interface.
Two temperature compensated Programmable Current
Generators, vary the output current with temperature
according to the contents of the associated nonvolatile
look-up table. The look-up table may be programmed
with arbitrary data by the user, via the 2-wire serial
port, and either an internal or external temperature
sensor may be used to control the output current
response. These temperature compensated pro-
grammable currents maybe used to control the
modulation current and the bias current of a laser
diode.
The integrated General Purpose EEPROM is included
for product data storage and can be used for
transceiver module information storage in laser diode
applications.
High Speed
Data Input
MOD_DEF(0)
MOD_DEF(1)
GBIC / SFP / XFP Module
X9530
I1 IMODSET
SDA
SCK
I2 IPINSET/IBIASSET
Laser
Diode
Driver
Circuit
VCC
LD
MPD
ILD IMON
REV 3.7 8/26/04
www.xicor.com
Characteristics subject to change without notice. 1 of 30




X9530 pdf, 반도체, 판매, 대치품
X9530
PRINCIPLES OF OPERATION
CONTROL AND STATUS REGISTERS
The Control and Status Registers provide the user with
a mechanism for changing and reading the value of
various parameters of the X9530. The X9530 contains
seven Control, one Status, and several Reserved
registers, each being one Byte wide (See Figure 1).
The Control registers 0 through 6 are located at
memory addresses 80h through 86h respectively. The
Status register is at memory address 87h, and the
Reserved registers at memory address 88h through
8Fh.
All bits in Control register 6 always power up to the
logic state “0”. All bits in Control registers 0 through 5
power up to the logic state value kept in their
corresponding nonvolatile memory cells. The
nonvolatile bits of a register retain their stored values
even when the X9530 is powered down, then powered
back up. The nonvolatile bits in Control 0 through
Control 5 registers are all preprogrammed to the logic
state “0” at the factory.
Bits indicated as “Reserved” are ignored when read,
and must be written as “0”, if any Write operation is
performed to their registers.
A detailed description of the function of each of the
Control and Status register bits follows:
Control Register 0
This register is accessed by performing a Read or
Write operation to address 80h of memory.
BL1, BL0: BLOCK LOCK PROTECTION BITS (NON-VOLATILE)
These two bits are used to inhibit any write operation to
certain addresses within the memory array. The
protected region of memory is determined by the
values of the two bits as shown in the table below:
Protected Addresses Partition of array
(Size)
locked
00
None (Default)
None (Default)
0 1 00h to 7Fh (128 bytes)
GPM
1 0 00h to 7Fh and 90h to
CFh (192 bytes)
GPM, LUT1
1 1 00h to 7Fh and 90h to GPM, LUT1, LUT2
10Fh (256 bytes)
Notice that if the Write Protect (WP) input pin of the
X9530 is active (LOW), then any write operation to the
memory is inhibited, irrespective of the Block Lock bit
settings.
VRM: VOLTAGE REFERENCE PIN MODE (NON-VOLATILE)
The VRM bit configures the Voltage Reference pin
(VRef) as either an input or an output. When the VRM
bit is set to “0” (default), the voltage at pin VRef is an
output from the X9530’s internal voltage reference.
When the VRM bit is set to “1”, the voltage reference
for the VRef pin is external. See Figure 2.
ADCIN: A/D CONVERTER INPUT SELECT (NON-VOLATILE)
The ADCIN bit selects the input of the on-chip A/D
converter. When the ADCIN bit is set to “0” (default),
the output of the on-chip temperature sensor is the
input to the A/D converter. When the ADCIN bit is set
to “1”, the input to the A/D converter is the voltage at
the VSense pin. See Figure 4.
ADCFILTOFF: ADC FILTERING CONTROL (NON-VOLATILE)
When this bit is“1”, the status register at 87h is updated
after every conversion of the ADC. When this bit is “0”
(default), the status register is updated after four
consecutive conversions with the same result.
NV1234: CONTROL REGISTERS 1, 2, 3, AND 4 VOLATILITY MODE
SELECTION BIT (NON-VOLATILE)
When the NV1234 bit is set to “0” (default), bytes
written to Control registers 1, 2, 3, and 4 are stored in
volatile cells, and their content is lost when the X9530
is powered down. When the NV1234 bit is set to “1”,
bytes written to Control registers 1, 2, 3, and 4 are
stored in both volatile and nonvolatile cells, and their
value doesn’t change when the X9530 is powered
down and powered back up. See “Writing to Control
Registers” on page 17.
I1DS: CURRENT GENERATOR 1 DIRECTION SELECT BIT
(NON-VOLATILE)
The I1DS bit sets the polarity of Current Generator 1,
DAC1. When this bit is set to “0” (default), the Current
Generator 1 of the X9530 is configured as a Current
Source. Current Generator 1 is configured as a Current
Sink when the I1DS bit is set to “1”. See Figure 5.
If the user attempts to perform a write operation to a
protected region of memory, the operation is aborted
without changing any data in the array.
REV 3.7 8/26/04
www.xicor.com
Characteristics subject to change without notice. 4 of 30

4페이지










X9530 전자부품, 판매, 대치품
X9530
I2FSO1–I2FSO0: CURRENT GENERATOR 2 FULL SCALE OUT-
PUT CURRENT SET BITS (NON-VOLATILE)
These two bits are used to set the full scale output
current at the Current Generator 2 pin, I2. If both bits
are set to “0” (default), an external resistor connected
between pin R2 and Vss, determines the full scale
output current available at pin I2. The other three
options are indicated in the table below. The direction
of this current is set by bit I2DS in Control Register 0.
I2FSO1
0
0
1
1
I2FSO0
0
1
0
1
I2 Full Scale Output Current
Set externally via pin R2 (Default)
±0.4mA*
±0.85 mA*
±1.3 mA*
*No external resistor should be connected in these cases between
R2 and VSS.
L1DAS: LUT1 DIRECT ACCESS SELECT BIT (NON-VOLATILE)
When bit L1DAS is set to “0” (default), LUT1 is
addressed by the output of the on-chip A/D converter.
When bit L1DAS is set to “1”, LUT1 is addressed by
bits L1DA5– L1DA0.
D1DAS: D/A 1 DIRECT ACCESS SELECT BIT (NON-VOLATILE)
When bit D1DAS is set to “0” (default), the input to the
D/A converter 1 is a row of LUT1. When bit D1DAS is
set to “1”, that input is the content of the Control
register 3.
L2DAS: LUT2 DIRECT ACCESS SELECT BIT (NON-VOLATILE)
When bit L2DAS is set to “0” (default), LUT2 is
addressed by the output of the on-chip A/D converter.
When bit L2DAS is set to “1”, LUT2 is addressed by
bits L2DA5–L2DA0.
D2DAS: D/A 2 DIRECT ACCESS SELECT BIT (NONVOLATILE)
When bit D2DAS is set to “0” (default), the input to the
D/A converter 2 is a row of LUT2. When bit D2DAS is
set to “1”, that input is the content of the Control
register 4.
Control Register 6
This register is accessed by performing a Read or
Write operation to address 86h of memory.
WEL: WRITE ENABLE LATCH (VOLATILE)
The WEL bit controls the Write Enable status of the
entire X9530 device. This bit must be set to “1” before
any other Write operation (volatile or nonvolatile).
Otherwise, any proceeding Write operation to memory
is aborted and no ACK is issued after a Data Byte.
The WEL bit is a volatile latch that powers up in the “0”
state (disabled). The WEL bit is enabled by writing
100000002 to Control register 6. Once enabled, the
WEL bit remains set to “1” until the X9530 is powered
down, and then up again, or until it is reset to “0” by
writing 000000002 to Control register 6.
A Write operation that modifies the value of the WEL
bit will not cause a change in other bits of Control
register 6.
Status Register – ADC Output
This register is accessed by performing a Read
operation to address 87h of memory.
AD5–AD0: A/D CONVERTER OUTPUT BITS (READ ONLY)
These six bits are the binary output of the on-chip A/D
converter. The output is 0000002 for minimum input
and 1111112 for full scale input.
REV 3.7 8/26/04
www.xicor.com
Characteristics subject to change without notice. 7 of 30

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부품번호상세설명 및 기능제조사
X9530

Temperature Compensated Laser Diode Controller

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