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XC9144-7PQ160C 데이터시트 PDF




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기능 XC95144 In-System Programmable CPLD
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XC9144-7PQ160C 데이터시트, 핀배열, 회로
1
® XC95144 In-System Programmable
CPLD
December 4, 1998 (Version 4.0)
1 1* Product Specification
Features
• 7.5 ns pin-to-pin logic delays on all pins
• fCNT to 111 MHz
• 144 macrocells with 3,200 usable gates
• Up to 133 user I/O pins
• 5 V in-system programmable
- Endurance of 10,000 program/erase cycles
- Program/erase over full commercial voltage and
temperature range
• Enhanced pin-locking architecture
• Flexible 36V18 Function Block
- 90 product terms drive any or all of 18 macrocells
within Function Block
- Global and product term clocks, output enables, set
and reset signals
• Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
• Programmable power reduction mode in each
macrocell
• Slew rate control on individual outputs
• User programmable ground pin capability
• Extended pattern security features for design protection
• High-drive 24 mA outputs
• 3.3 V or 5 V I/O capability
• Advanced CMOS 5V FastFLASH technology
• Supports parallel programming of more than one
XC9500 concurrently
• Available in 100-pin PQFP, 100-pin TQFP, and 160-pin
PQFP packages
Description
The XC95144 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of eight
36V18 Function Blocks, providing 3,200 usable gates with
propagation delays of 7.5 ns. See Figure 2 for the architec-
ture overview.
Power Management
Power dissipation can be reduced in the XC95144 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
Operating current for each design can be approximated for
specific operating conditions using the following equation:
ICC (mA) =
MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
Where:
MCHP = Macrocells in high-performance mode
MCLP = Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
Figure 1 shows a typical calculation for the XC95144
device.
600
400
(300)
200
(160)
High Performance
Low Power
(480)
(320)
0 50 100
Clock Frequency (MHz)
X5898B
Figure 1: Typical Icc vs. Frequency for XC95144
December 4, 1998 (Version 4.0)
1




XC9144-7PQ160C pdf, 반도체, 판매, 대치품
XC95144 In-System Programmable CPLD
DC Characteristics Over Recommended Operating Conditions
Symbol
Parameter
VOH
Output high voltage for 5 V operation
Output high voltage for 3.3 V operation
VOL Output low voltage for 5 V operation
Output low voltage for 3.3 V operation
IIL Input leakage current
IIH I/O high-Z leakage current
CIN I/O capacitance
ICC Operating Supply Current
(low power mode, active)
Test Conditions
IOH = -4.0 mA
VCC = Min
IOH = -3.2 mA
VCC = Min
IOL = 24 mA
VCC = Min
IOL = 10 mA
VCC = Min
VCC = Max
VIN = GND or VCC
VCC = Max
VIN = GND or VCC
VIN = GND
f = 1.0 MHz
VI = GND, No load
f = 1.0 MHz
Min Max Units
2.4 V
2.4 V
0.5 V
0.4 V
±10.0 µA
±10.0 µA
10.0 pF
160 (Typ)
ma
AC Characteristics
Symbol
Parameter
tPD I/O to output valid
tSU I/O setup time before GCK
tH I/O hold time after GCK
tCO GCK to output valid
fCNT1
16-bit counter frequency
fSYSTEM 2 Multiple FB internal operating frequency
tPSU
I/O setup time before p-term clock input
tPH I/O hold time after p-term clock input
tPCO
P-term clock to output valid
tOE GTS to output valid
tOD GTS to output disable
tPOE
Product term OE to output enabled
tPOD
Product term OE to output disabled
tWLH
GCK pulse width (High or Low)
XC95144-7
Min
4.5
0.0
125.0
83.3
0.5
4.0
4.0
Max
7.5
4.5
8.5
5.5
5.5
9.5
9.5
XC95144-10
Min
6.0
0.0
111.1
66.7
2.0
4.0
4.5
Max
10.0
6.0
10.0
6.0
6.0
10.0
10.0
XC95144-15
Min Max
15.0
8.0
0.0
8.0
95.2
55.6
4.0
4.0
12.0
11.0
11.0
14.0
14.0
5.5
Units
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Note: 1. fCNT is the fastest 16-bit counter frequency available, using the local feedback when applicable.
fCNT is also the Export Control Maximum flip-flop toggle rate, fTOG.
2. fSYSTEM is the internal operating frequency for general purpose system designs spanning multiple FBs.
4 December 4, 1998 (Version 4.0)

4페이지










XC9144-7PQ160C 전자부품, 판매, 대치품
XC95144 In-System Programmable CPLD
XC95144 I/O Pins (continued)
Function
Block
Macrocell
TQ
100
PQ
100
PQ
160
BScan
Order
Notes
5 1 – – 65 213
5 2 35 37 58 210
5 3 – – 66 207
5 4 – – 67 204
5 5 36 38 59 201
5 6 37 39 60 198
5 7 – – 74 195
5 8 39 41 62 192
5 9 40 42 63 189
5 10 – – 76 186
5 11 41 43 64 183
5 12 42 44 68 180
5 13 – – 78 177
5 14 43 45 69 174
5 15 46 48 72 171
5 16 – – 83 168
5 17 49 51 77 165
5 18 – – – 162
6 1 – – – 159
6 2 74 76 117 156
6 3 – – 119 153
6 4 – – 123 150
6 5 76 78 122 147
6 6 77 79 124 144
6 7 – – 125 141
6 8 78 80 126 138
6 9 79 81 129 135
6 10 – – 128 132
6 11 80 82 133 129
6 12 81 83 134 126
6 13 – – 130 123
6 14 82 84 135 120
6 15 85 87 138 117
6 16 – – 131 114
6 17 86 88 139 111
6 18 – – – 108
Function
Block
Macrocell
TQ
100
PQ
100
PQ
160
BScan
Order
Notes
7 1 – – – 105
7 2 50 52 79 102
7 3 – – 84 99
7 4 – – 85 96
7 5 52 54 82 93
7 6 53 55 86 90
7 7 – – 87 87
7 8 54 56 88 84
7 9 55 57 90 81
7 10 – – 89 78
7 11 56 58 92 75
7 12 58 60 95 72
7 13 – – 91 69
7 14 59 61 96 66
7 15 60 62 97 63
7 16 – – 93 60
7 17 61 63 98 57
7 18 – – – 54
8 1 – – – 51
8 2 63 65 101 48
8 3 – – 105 45
8 4 – – 107 42
8 5 64 66 102 39
8 6 65 67 103 36
8 7 – – 109 33
8 8 66 68 104 30
8 9 67 69 106 27
8 10 – – 112 24
8 11 68 70 108 21
8 12 70 72 111 18
8 13 – – 114 15
8 14 71 73 113 12
8 15 72 74 115 9
8 16 – – 118 6
8 17 73 75 116 3
8
18
– ––
0
December 4, 1998 (Version 4.0)
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