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VNS14NV04 데이터시트 PDF




STMicroelectronics에서 제조한 전자 부품 VNS14NV04은 전자 산업 및 응용 분야에서
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PDF 형식의 VNS14NV04 자료 제공

부품번호 VNS14NV04 기능
기능 fully autoprotected Power MOSFET
제조업체 STMicroelectronics
로고 STMicroelectronics 로고


VNS14NV04 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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VNS14NV04 데이터시트, 핀배열, 회로
VNB14NV04, VND14NV04
VND14NV04-1, VNS14NV04
"OMNIFET II"
fully autoprotected Power MOSFET
Features
TYPE
VNB14NV04
VND14NV04
VND14NV04-1
VNS14NV04
RDS(on)
35 mΩ
Ilim
12 A
Vclamp
40 V
Linear current limitation
Thermal shutdown
Short circuit protection
Integrated clamp
Low current drawn from input pin
Diagnostic feedback through input pin
ESD protection
Direct access to the gate of the Power
MOSFET (analog driving)
Compatible with standard Power MOSFET
33
1
2
1
TO-252 (DPAK) TO-251 (IPAK)
SO-8
3
1
D2PAK
Description
The VNB14NV04, VND14NV04, VND14NV04-1 and
VNS14NV04 are monolithic devices made using
STMicroelectronics VIPower™ M0 technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shutdown, linear current limitation and
overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1. Device summary
Package
Tube
D2PAK
VNB14NV04
TO-252 (DPAK)
VND14NV04
TO-251 (IPAK)
VND14NV04-1
SO-8
VNS14NV04
Tube (lead free)
VNB14NV04-E
VND14NV04-E
VND14NV04-1-E
-
Tape and reel
VNB14NV0413TR
VND14NV0413TR
-
-
Tape and reel (lead free)
VNB14NV04TR-E
VND14NV04TR-E
-
-
September 2013
Doc ID 7393 Rev 9
1/31
www.st.com
1




VNS14NV04 pdf, 반도체, 판매, 대치품
List of figures
List of figures
VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance vs. input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance vs. input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance vs. id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input voltage vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normalized input threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Current limit vs. junction temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
D2PAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . 17
D2PAK demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
DPAK PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DPAK Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . 18
DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-8 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . 20
D2PAK PC board(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
D2PAK Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 21
D2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22
Thermal fitting model of an OMNIFET II in D2PAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
TO-251 (IPAK) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
D2PAK package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
TO-252 (DPAK) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4/31 Doc ID 7393 Rev 9

4페이지










VNS14NV04 전자부품, 판매, 대치품
VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04
Electrical specification
2.2 Thermal data
Table 3. Thermal data
Symbol
Parameter
SO-8
Value
DPAK IPAK
D2PAK
Unit
Rthj-case Thermal resistance junction-case max
1.7 1.7 1.7 °C/W
Rthj-lead
Rthj-amb
Thermal resistance junction-lead max
Thermal resistance junction-ambient max
27 °C/W
90(1) 65(1) 102 52(1) °C/W
1. When mounted on a standard single-sided FR4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all DRAIN
pins. Horizontal mounting and no artificial air flow.
2.3 Electrical characteristics
-40 < Tj < 150 °C unless otherwise specified.
Table 4.
Symbol
Electrical characteristics
Parameter
Test Conditions
Off
VCLAMP Drain-source clamp voltage
VCLTH
Drain-source clamp threshold
voltage
VINTH
IISS
Input threshold voltage
Supply current from input pin
VINCL Input-source clamp voltage
IDSS
Zero input voltage drain current
(VIN=0 V)
VIN=0 V; ID=7 A
VIN=0 V; ID=2 mA
VDS=VIN; ID=1 mA
VDS=0 V; VIN=5 V
IIN=1 mA
IIN=-1 mA
VDS=13 V; VIN=0 V; Tj=25 °C
VDS=25 V; VIN=0 V
On
RDS(on)
Static drain-source on resistance
Vin = 5 V ID = 7 A Tj = 25 °C
Vin = 5 V ID = 7 A
Dynamic (Tj=25°C, unless otherwise specified)
gfs (1)
Coss
Forward transconductance
Output capacitance
VDD = 13 V ID = 7 A
VDS = 13 V f = 1 MHz VIN = 0 V
Switching
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
VDD = 15 V ID = 7 A
Vgen = 5 V Rgen = RIN MIN =10 Ω
(see Figure 3)
Min Typ Max Unit
40 45 55 V
36 V
0.5 2.5 V
100 150 µA
6 6.8 8
V
-1.0 -0.3
30
µA
75
35
mΩ
70
18 S
400 pF
80 250 ns
350 1000 ns
450 1350 ns
150 500 ns
Doc ID 7393 Rev 9
7/31

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관련 데이터시트

부품번호상세설명 및 기능제조사
VNS14NV04

fully autoprotected Power MOSFET

STMicroelectronics
STMicroelectronics

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