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PDF VP503 Data sheet ( Hoja de datos )
| Número de pieza | VP503 | |
| Descripción | CRT Display Video Output Amplifier: High-Voltage/ Wideband Amplification | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : EN4933A
Wideband Output Module (Video Pack)
VP503
CRT Display Video Output Amplifier:
High-Voltage, Wideband Amplification
Function
• Three-channel video output circuit for CRT displays
Package Dimensions
unit: mm
2117
[VP503]
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Symbol
VCC max
VBB max
Conditions
Allowable power dissipation
Case temperature
Storage temperature
Pd max
Tc max
Tstg
At Tc = 25°C with an ideal heat sink
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage I
Recommended supply voltage II
Symbol
VCC
VBB
VCC
VBB
Conditions
Ratings
90
15
4.5
25
100
–20 to +110
Unit
V
V
W
W
°C
°C
Ratings
70
10
80
10
Unit
V
V
V
V
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
D3096HA(OT) No. 4933-1/11
1 page  
VP503
Operating Procedures
1. Setting the operating point
An optimal DC bias must be provided to operate a video pack and acquire the stipulated output dynamic range and
bandwidth characteristics. Basically, the center point output voltage with no input should be set according to the
following formula.
V0 (CENTER) = (VCC + VBB)/2
While the optimal operating point when an AC input is applied will be similar, the recommended electrical
characteristics should be referred to when setting the operating point. The figures below show the DC and AC
waveforms when the Sanyo test jig is used. The design of this product series was optimized so that these products
provide adequate high-power characteristics.
2. Optimal peaking technique for mounted products (VP503 Series)
• Termination LC peaking
As can be seen from the internal equivalent circuit diagram, this series differs from earlier series in that peaking is
not applied using an internal coil. Since the high-frequency region peaking point is determined by an LC resonator
at the termination, the total distributed capacitance of the output side is particularly important. Accordingly, since
the independent evaluation board timing characteristics will differ from the actual output load capacitance when an
output cable is installed, the high-frequency area peaking point that corresponds to the output load state in the
mounted circuit must be found.
(Adjust the circuit using an output matching RC circuit at the same time.)
• RC emitter peaking
The purpose of the emitter peaking value is to increase the AC gain from the mid-frequency area to the high-
frequency area. This should be determined last, after adjusting the termination peaking and output peaking RC
circuits. (To compensate for high-frequency gain degradation at the IC side.)
• Output matching RC circuit
This circuit is used in conjunction with the peaking compensation in each section to match the IC internal
impedance with the output load impedance. Mount this RC circuit in the vicinity of the protection diode and the IC
output pins. Adjust this circuit to correct system characteristics while observing the mid-frequency characteristics,
the amount of overshoot in the pulse response, and other aspects. Since the AC gain from the mid-frequency area to
the high-frequency area will be reduced somewhat by this adjustment, determine the setting by adjusting the value
of the resistor precisely.
The required circuit operating conditions can be set up smoothly if the following flowchart is used to adjust the
peaking values.
No. 4933-5/11
5 Page 
VP503
Peripheral wiring and ground leading:
When shipped, the VP503 product lead pins have standard support for forming (zigzag) so that the distance between pins
will be 2.54 mm. Also, the pin layout is standardized to the I/O and power supply line arrangement shown below.
IC Surrounding Pin Layout (Top view)
Note: Design applications that use two-sided printed circuit boards or similar technologies so that input and output lines
do not cross. Crossed lines can lead to increased crosstalk. Also, lines should be kept as short as possible, and
lines in the ground pattern should be made as wide as possible. These layout design principles will minimize
bandwidth degradation and oscillation.
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
s Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of August, 1997. Specifications and information herein are subject to
change without notice.
No. 4933-11/11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet VP503.PDF ] | |
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