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What is V62C1162048L-100B?

This electronic component, produced by the manufacturer "Mosel Vitelic Corp", performs the same function as "Ultra Low Power 128K x 16 CMOS SRAM".


V62C1162048L-100B Datasheet PDF - Mosel Vitelic Corp

Part Number V62C1162048L-100B
Description Ultra Low Power 128K x 16 CMOS SRAM
Manufacturers Mosel Vitelic Corp　
Logo Mosel Vitelic Corp Logo　


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Features
• Low-power consumption
- Active: 35mA ICC at 70ns
- Stand-by: 10 µA (CMOS input/output)
2 µA (CMOS input/output, L version)
• 70/85/100/120 ns access time
• Equal access and cycle time
• Single +1.8V to2.2V Power Supply
• Tri-state output
• Automatic power-down when deselected
• Multiple center power and ground pins for
improved noise immunity
• Individual byte controls for both Read and
Write cycles
• Available in 44 pin TSOPII / 48-fpBGA / 48-µBGA
V62C1162048L(L)
Ultra Low Power
128K x 16 CMOS SRAM
Functional Description
The V62C1162048L is a Low Power CMOS Static
RAM organized as 131,072 words by 16 bits. Easy
Memory expansion is provided by an active LOW (CE)
and (OE) pin.
This device has an automatic power-down mode feature
when deselected. Separate Byte Enable controls (BLE
and BHE) allow individual bytes to be accessed. BLE
controls the lower bits I/O1 - I/O8. BHE controls the
upper bits I/O9 - I/O16.
Writing to these devices is performed by taking Chip
Enable (CE) with Write Enable (WE) and Byte Enable
(BLE/BHE) LOW.
Reading from the device is performed by taking Chip
Enable (CE) with Output Enable (OE) and Byte Enable
(BLE/BHE) LOW while Write Enable (WE) is held
HIGH.
Logic Block Diagram
TSOPII / 48-fpBGA / 48-µBGA (See nest page)
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
I/O1 - I/O8
I/O9 - I/O16
WE
OE
BHE
BLE
CE
Pre-Charge Circuit
Memory Array
1024 X 2048
Vcc
Vss
Data
Cont I/O Circuit
Data
Cont
Column Select
A10 A11 A12 A13 A14 A15 A16
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
I/O1 7
I/O2 8
I/O3 9
I/O4 10
Vcc 11
Vss 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
WE 17
A16 18
A15 19
A14 20
A13 21
A12 22
44 A5
43 A6
42 A7
41 OE
40 BHE
39 BLE
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 Vss
33 Vcc
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
REV. 1.2 May 2001 V62C1162048L(L)
1

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V62C1162048L-100B equivalent
V62C1162048L(L)
Read Cycle (9) (Vcc = 1.8 to 2.2V, Gnd = 0V, TA = 00C to +700C / -400C to +850C)
Parameter
Sym -70
-85 -100 -120 Unit Note
Read Cycle Time
Min Max Min Max Min Max Min Max
tRC 70 - 85 - 100 - 120 -
ns
Address Access Time
tAA - 70 - 85 - 100 - 120 ns
Chip Enable Access Time
tACE - 70 - 85 - 100 - 120 ns
Output Enable Access Time
tOE
- 40 - 40 - 50 -
60
ns
Output Hold from Address Change
tOH 10 - 10 - 10 - 10 -
ns
Chip Enable to Output in Low-Z
tLZ 10 - 10 - 10 - 10 -
ns 4,5
Chip Disable to Output in High-Z
tHZ
- 30 - 35 - 40 -
45
ns 3,4,5
Output Enable to Output in Low-Z
tOLZ 5 - 5 - 5 - 5
-
ns
Output Disable to Output in High-Z
tOHZ - 25 - 30 - 35 - 40 ns
BLE, BHE Enable to Output in Low-Z
tBLZ 5 - 5 - 5 - 5
-
ns 4,5
BLE, BHE Disable to Output in High-Z tBHZ - 25 - 30 - 35 - 40 ns 3,4,5
BLE, BHE Access Time
tBA
- 40 - 40 - 50 -
60
ns
Write Cycle (11) (Vcc = 1.8 to 2.2V, Gnd = 0V, TA = 00C to +700C / -400C to +850C)
Parameter
Write Cycle Time
Chip Enable to Write End
Address Setup to Write End
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to Write End
Data Hold Time
Write Enable to Output in High-Z
Output Active from Write End
BLE, BHE Setup to Write End
Symbol -70 -85 -100 -120
Min Max Min Max Min Max Min Max
tWC 70 - 85 - 100 - 120 -
tCW
60 - 70 - 80 - 90
-
tAW
60 - 70 - 80 - 90
-
tAS
0-0-0- 0
-
tWP
50 - 60 - 70 - 80
-
tWR
0-0-0- 0
-
tDW
30 - 35 - 40 - 45
-
tDH
0-0-0- 0
-
tWHZ - 30 - 35 - 40 - 45
tOW
5-5-5- 5
-
tBW
60 - 70 - 80 - 90
-
5
Unit Note
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
REV. 1.2 May 2001 V62C1162048L(L)


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Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for V62C1162048L-100B electronic component.


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V62C1162048L-100BThe function is Ultra Low Power 128K x 16 CMOS SRAM. Mosel Vitelic CorpMosel Vitelic Corp
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