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TYN608 데이터시트 PDF




STMicroelectronics에서 제조한 전자 부품 TYN608은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 TYN608 자료 제공

부품번호 TYN608 기능
기능 Sensitive and standard 8A SCRs
제조업체 STMicroelectronics
로고 STMicroelectronics 로고


TYN608 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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TYN608 데이터시트, 핀배열, 회로
TN805, TN815, TS820, TYN608
Sensitive and standard 8 A SCRs
A
A
K
G
TO-220AB
G
A
K
A
TO-220FPAB
G
A
K
A
KA
G
IPAK
KA
G
TO-220AB
A
KA
G
DPAK
Features
On-state rms current, IT(RMS) 8 A
Repetitive peak off-state voltage, VDRM/VRRM
600 and 800 V
Triggering gate current, IGT 0.2 to 15 mA
Datasheet - production data
Description
Available either in sensitive (TS8) or standard
(TN8 / TYN) gate triggering levels, the 8 A SCR
series is suitable to fit all modes of control found
in applications such as overvoltage crowbar
protection, motor control circuits in power tools
and kitchen aids, inrush current limiting circuits,
capacitive discharge ignition and voltage
regulation circuits.
Available in through-hole or surface-mount
packages, they provide an optimized performance
in a limited space.
Table 1. Device summary
Order code
Voltage (x00)
VDRM/VRRM
Sensitivity
Package
IGT
600 V 800 V
TS820-600B X
0.2 mA DPAK
TS820-600H X
0.2 mA
IPAK
TS820-600T X
0.2 mA
TO-
220AB
TS820-600FP X
0.2 mA
TO-
220FPA
B
TN805-600B X
5 mA
DPAK
TN815-x00B X X 15 mA DPAK
TYN608RG X
15 mA
TO-
220AB
May 2014
This is information on a product in full production.
DocID7476 Rev 8
1/17
www.st.com




TYN608 pdf, 반도체, 판매, 대치품
Characteristics
TN805, TN815, TS820, TYN608
Figure 3. Average and DC on-state current
versus ambient temperature
IT(AV)(A)
2,5
D.C.
2,0
α = 180°
1,5
Recommended pad layout,
FR4 printed circuit board
TO-220AB
TO-220FPAB
Figure 4. Relative variation of thermal
impedance junction to case versus pulse
duration
K=[Zth(j-c)/Rth(j-c)]
1.0
0.5
1,0
0,5
0,0
0
DPAK
IPAK
25
Tamb(°C)
50 75
100
0.2
0.1
125 1E-3
tp(s)
1E-2
1E-1
1E+0
Figure 5. Relative variation of thermal
impedance junction to ambient versus pulse
duration
Figure 6. Relative variation of gate trigger
current and holding current versus junction
temperature for TS820
K=[Zth(j-a)/Rth(j-a)]
1.00
Recommended pad layout,
FR4 printed circuit board
0.10
DPAK
TO-220AB / IPAK
TO-220FPAB
tp(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
IGT,IH,IL[Tj] / IGT,IH,IL[Tj=25°C]
2.0
1.8
IGT
1.6
1.4
1.2
1.0
IH & IL
RGK = 1kΩ
0.8
0.6
0.4
0.2 Tj(°C)
0.0
-40 -20
0
20 40
60
80 100 120 140
Figure 7. Relative variation of gate trigger and Figure 8. Relative variation of holding current
holding current versus junction temperature versus gate-cathode resistance (typical values)
IGT,IH,IL[Tj] / IGT,IH,IL[Tj=25°C]
2.4
2.2
2.0 IGT
1.8
1.6
1.4
1.2 IH & IL
1.0
0.8
0.6
0.4
0.2 Tj(°C)
0.0
-40 -20 0 20 40 60
TN8 and TYNx8
80 100 120 140
IH[RGK] / IH[RGK=1kΩ]
6.0
5.5 TS8
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1E-2
RGK(kΩ)
1E-1
1E+0
Tj = 25°C
1E+1
4/17
DocID7476 Rev 8

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TYN608 전자부품, 판매, 대치품
TN805, TN815, TS820, TYN608
Package information
Table 6. DPAK dimension values
Dimensions
Ref. Millimeters
Inches
Min.
A 2.18
A1 0.90
A2 0.03
b 0.64
b4 4.95
c 0.46
c2 0.46
D 5.97
D1 5.10
E 6.35
E1
e1 4.40
H 9.35
L 1.00
L2
L4 0.60
V2 0°
Typ.
4.32
Max.
2.40
1.10
0.23
0.90
5.46
0.61
0.60
6.22
6.73
4.70
10.40
1.78
1.27
1.02
Min.
0.086
0.035
0.001
0.025
0.195
0.018
0.018
0.235
0.201
0.250
0.173
0.368
0.039
0.023
Typ.
0.170
Figure 16. Footprint (dimensions in mm)
Max.
0.094
0.043
0.009
0.035
0.215
0.024
0.023
0.244
0.264
0.185
0.409
0.070
0.05
0.040
6.7 3.0 3.0
A
6.7 5.094
B
The device must be positioned within
0.05 A B
1.6
DocID7476 Rev 8
7/17
17

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