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기능 SDH/SONET STM1/OC3 postamplifier
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TZA3034TT 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
TZA3034
SDH/SONET STM1/OC3
postamplifier
Product specification
Supersedes data of 1999 Mar 16
File under Integrated Circuits, IC19
1999 Nov 03




TZA3034TT pdf, 반도체, 판매, 대치품
Philips Semiconductors
SDH/SONET STM1/OC3 postamplifier
Product specification
TZA3034
PINNING
SYMBOL
PIN
TZA3034T
TZA3034TT
PAD
TZA3034U
TYPE(1)
DESCRIPTION
SUB
TEST
1
1, 14
S substrate pin; must be at the same potential as pin AGND
2
2, 10, 15,
for test purpose only; to be left open in the application
21, 26
AGND
3
3, 4, 6, 9
S analog ground; must be at the same potential as pin DGND
DIN 4 7 I differential input; complementary to pin DINQ; DC bias level is set
internally at approximately 2.1 V
DINQ
5
8 I differential input; complementary to pin DIN; DC bias level is set
internally at approximately 2.1 V
VCCA
CF
JAM
6
11, 12
S analog supply voltage; must be at the same potential as pin VCCD
7 13 A input for connection of capacitor to set time constant of level detector
input filter (optional); the capacitor should be connected between
VCCA and pin CF
8 16 I PECL-compatible input; controls the output buffers,
pins DOUT and DOUTQ; when a LOW signal is applied, the output
buffers will follow the input signal; when a HIGH signal is applied, the
output buffers will latch into LOW and HIGH states respectively;
when not connected, pin JAM is actively pulled LOW
STQ
9 17 O PECL-compatible status output of the input signal level detector;
when the input signal is below the user-programmed threshold level,
this output is HIGH; complementary to pin ST
ST 10 18 O PECL-compatible status output of the input signal level detector;
when the input signal is below the user-programmed threshold level,
this output is LOW; complementary to pin STQ
DGND
11 19, 20, 22, S digital ground; must be at the same potential as pin AGND
25
DOUTQ
12
23 O PECL-compatible differential output; this pin will be forced into a
HIGH condition when pin JAM is HIGH; complementary to pin DOUT
DOUT
13
24 O PECL-compatible differential output; this pin will be forced into a
LOW condition when pin JAM is HIGH; complementary to
pin DOUTQ
VCCD
Vref
14
27, 28
S digital supply voltage; must be at the same potential as VCCA
15 29 O band gap reference voltage; typical value is 1.2 V; internal series
resistor of 1 k
RSET
16
30 A input signal level detector threshold setting; nominal DC voltage is
VCCA 1.5 V; threshold level is set by connecting an external resistor
between VCCA and pin RSET or by forcing a current into pin RSET;
default value for this resistor is 180 kwhich corresponds with
approximately 4 mV (p-p) differential input signal
n.c.
5, 31, 32
not connected
Note
1. Pin type abbreviations: O = Output, I = Input, S = power Supply and A = Analog function.
1999 Nov 03
4

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TZA3034TT 전자부품, 판매, 대치품
Philips Semiconductors
SDH/SONET STM1/OC3 postamplifier
Product specification
TZA3034
handbook, halfpage
(1)
(2)
VCC
VOH(max)
VOH(min)
VOL(max)
VOL(min)
GND
MGS812
(1) Output signal on pins DOUT or ST; complementary to output signal (2).
(2) Output signal on pins DOUTQ or STQ; complementary to output signal (1)
Fig.4 Logic level symbol definitions for PECL outputs.
handbook, haVlfpCaCge
DIN
4.5 k
2.1 V
DINQ
4.5 k
1 mA
MGR958
1999 Nov 03
Fig.5 Data input circuit DIN and DINQ.
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TZA3034T

SDH/SONET STM1/OC3 postamplifiers

NXP Semiconductors
NXP Semiconductors
TZA3034T

SDH/SONET STM1/OC3 postamplifier

NXP Semiconductors
NXP Semiconductors

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