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TS68302VA16 데이터시트 PDF




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부품번호 TS68302VA16 기능
기능 Integrated Multiprotocol Processor IMP
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TS68302VA16 데이터시트, 핀배열, 회로
Features
TS68000/TS68008 Microprocessor Core Supporting a 16- or 8-bit TS68000 Family
System Integration Block Including:
– Independent Direct Memory Access (IDMA) Controller
– Interrupt Controller with Two Modes of Operation
– Parallel Input/output (I/O) Ports, some with Interrupt Capability
– On-chip Usable 1152 bytes of Dual-port Random-access Memory (RAM)
– Three Timers, including a Watchdog Timer
– Four Programmable Chip-select Lines with Wait-state Logic
– Programmable Address Mapping of Dual-port RAM and IMP Registers
– On-chip Clock Generator with an Output Clock Signal
– System Control:
System Control Register
Bus Arbitration Logic with Low Interrupt Latency Support
Hardware Watchdog for Monitoring Bus Activity
Low Power (Standby) Modes
Disable CPU Logic (TS68000)
Freeze Control for Debugging Selected On-chip Peripherals
DRAM Refresh Controller
Communications Processor Including:
– Main Controller (RISC Processor)
– Three Full-duplex Serial Communication Controllers (SCCs)
– Six Serial Direct Memory Access (SDMA) Channels Dedicated to the Three SCCs
– Flexible Physical Interface Accessible by SCCs for Interchip Digital Link (IDL)
General Circuit Interface (GCI, see note), Pulse Code Modulation (PCM), and
Nonmultiplexed Serial Interface (NMSI) Operation
– Serial Communication Port (SCP) for Synchronous Communication, Clock Rate up
to 4.096 MHz
– Serial Management Controllers (SMCs) for IDL and GCI Channels
Frequency of Operation: 16.67 MHz
Power Supply: 5 VDC ± 10%
Description
The IMP is a very large-scale integration (VLSI) device incorporating the main building
blocks needed for the design of a wide variety of controllers. The device is especially
suitable to applications in the communications industry. The IMP is the first device to
offer the benefits of a closely coupled, industry-standard, TS68000/TS68008 micro-
processor core and a flexible communications architecture. This multichannel
communications device may be configured to support a number of popular industry
interfaces, including those for the integrated services digital network (ISDN) basic rate
and terminal adapter applications. Through a combination of architectural and pro-
grammable features, concurrent operation of different protocols is easily achieved
using the IMP. Data concentrators, line cards, bridges, and gateways are examples of
suitable applications for this versatile device.
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS)
device consisting of a TS68000/TS68008 microprocessor core, a system integration
block (SIB), and a communications processor (CP). The TS68302 block diagram is
shown in Figure 1.
Note: GCI is sometimes referred to as IOM2.
Integrated
Multiprotocol
Processor (IMP)
TS68302
Rev. 2117A–HIREL–11/02
1




TS68302VA16 pdf, 반도체, 판매, 대치품
Pin Assignments
Figure 2. PGA Terminal Designation
N
PB10 TIN1 IACK1 GND UDS R/W EXTAL VDD IPL1 IPL2 RESET HALT RCLK1
M
CS3 TOUT2 TIN2 VDD IACK7 AS GND CLK0 BERR BR BGACK BG RTS3
L
CS2 PB11 GND TOUT1 IACK6 LDS XTAL IPL0 AVEC NC1 BCLR TCLK1 CD3
K
CS0 RMC IAC PB9 WDOG
DTACK VDD TXD1 RTS1 BUSW
J
FC2 CS1 GND PB8
GND BRG1 NC3 DISCPU
H
FC0 VDD FC1
TS68302
FRZ DONE DACK
G
A1 A3 A2
BOTTOM VIEW
PA12 DREQ GND
F
GND A4 A5
TXD3 RCLK3 TCLK3
E
A6 A8 A9 VDD
TXD2 CD2 SDS2 RXD3
D
A7 GND A12 A15 A16
RXD2 CTS1 TCLK2 GND VDD
C
A10 A13 A17 GND A23 D14 D11 VDD D4 D1 CD1 RCLK2 RTS2
B A11 A18 A19 A20 VDD D13 D10 D8 D5 D2 D0 CTS3 CTS2
A A14 A21 A22 GND D15 D12 GND D9 D7 D6 GND D3 RXD1
1 2 3 4 5 6 7 8 9 10 11 12 13
Figure 3. CERQUAD Terminal Designation
VDD
A16
A17
A18
A19
GND
A20
A21
A22
A23
VDD
GND
D15
D14
D13
D12
GND
D11
D10
D9
D8
VDD
D7
D6
D5
D4
GND
D3
D2
D1
D0
CTS3
CD1
17
50
1
68302
CERQUAD132
(window frame down)
Top VIEW
117
83
GND
TOUT2
TIN2
TOUT1
VDD
TIN1
IACK1
IACK6
IACK7
GND
UDS
LDS
AS
R/W
GND
XTAL
EXTAL
VDD
CLK0
IPL0
IPL1
IPL2
BERR
AVEC
RESET
HALT
BR
NC1
BGACK
BG
BCLR
DTACK
GND
4 TS68302
2117A–HIREL–11/02

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TS68302VA16 전자부품, 판매, 대치품
TS68302
Design and Construction
Terminal Connections
Lead Material and Finish
Package
Depending on the package, the terminal connections shall be as shown in Figure 2 and
Figure 3.
Lead material and finish shall be any option of MIL-M-38535.
The macrocircuits are packaged in hermetically sealed ceramic packages, which con-
form to case outlines of MIL-M-38535 appendix A (when defined):
• 132-pin Ceramic Pin Grid Array (PGA),
• 132-pin Ceramic Quad Flat Pack (CERQUAD).
The precise case outlines are described in Figure 2 and Figure 3.
Electrical Characteristics
Table 2. Absolute Maximum Ratings
Symbol Parameter
Min Max
Unit
PD Power Dissipation (typical at 16.67 MHz)(1)
53 64 mA
PD Power Dissipation (typical at 8 MHz)(1)
26 31 mA
LPD Low Power Mode Dissipation (typical at 16.67 MHz)(2)
36 mA
LPD Lowest Power Mode Dissipation (typical at 16.67 MHz)(3)
32 mA
LPD Lowest Power Mode Dissipation (typical at 50 MHz)(4)
1 mA
Notes: 1. The values shown are typical. The typical value varies as shown, based on how many IMP on-chip peripherals are enabled
and the rate at which they are clocked.
2. LPREC = 0. Divider = 2.
3. LPREC = 1. Divider = 1024.
4. The stated frequency must be externally applied to EXTAL only after the IMP has been placed in the lowest power mode
with LPREC = 1. The 68000 core is not specified to operate at this frequency, but the rest of the IMP is. In this configuration,
the user does not divide the clock internally using the LPCD4-LPCD0 bits in the system control register.
Unless otherwise stated, all voltages are referenced to the reference terminal (see Table 1).
Table 3. Recommended Condition of Use
Symbol Parameter
Min
VCC
VIL
VIH
Tcase
tr(c)
tf(c)
fc
tcyc
Supply Voltage
Low Level Input Voltage
High Level Input Voltage
Operating Temperature
Clock Rise Time - See Figure 5
Clock Fall Time Resistance - Figure 5
Clock Frequency - See Figure 5
Cycle Time - See Figure 5
4.5
-0.3
2.4
-55
8
60
Max
5.5
+0.5
5.5
+125
5
5
16.67
125
Unit
V
V
V
°C
ns
ns
MHz
ns
2117A–HIREL–11/02
7

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부품번호상세설명 및 기능제조사
TS68302VA16

Integrated Multiprotocol Processor IMP

ATMEL Corporation
ATMEL Corporation

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