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TK75018VCTL 데이터시트 PDF




TOKO에서 제조한 전자 부품 TK75018VCTL은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 TK75018VCTL 기능
기능 SWITCHED CAPACITOR VOLTAGE CONVERTER WITH REGULATOR
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TK75018VCTL 데이터시트, 핀배열, 회로
TK75018
FEATURES
s 35 mA (typ.) Output Current
s Operating Range 3.5 to 7 V
s Reference and Error Amplifier for Regulation
s External Shutdown
s External Oscillator Synch
SWITCHED CAPACITOR VOLTAGE
CONVERTER WITH REGULATOR
APPLICATIONS
s Voltage Inverter
s Negative Voltage Doubler
s Voltage Regulator
s Positive Voltage Doubler
TK75018
FB/SD
CAP +
V+
OSC
DESCRIPTION
The TK75018 is a monolithic switched capacitor converter
with feedback control. With just two capacitors, the TK75018
can create a negative voltage supply which tracks a
positive supply. As an alternative, the feedback pin can be
used to establish regulation at a desired voltage, and it can
also be used as a shutdown signal input. A single TK75018
can also be configured as a non-inverting step-up converter
or dual output voltage doubler.
With no external timing elements, the converter will self-
oscillate at 25 kHz, nominal. This frequency can also be
user adjusted with a small capacitor or synchronized to
another oscillator.
Quiescent current is typically 2.5 mA. Standby current is
guaranteed less than 200 µA over the full operating
temperature and input voltage ranges.
GND
CAP -
FB/SD
CAP +
GND
CAP -
FB/SD
NC
CAP+
GND
NC
CAP-
NC
Vref
VOUT
V+
OSC
Vref
VOUT
V+
NC
OSC
Vref
NC
NC
VOUT
ORDERING INFORMATION
TK75018 C
Package Code
Tape/Reel Code
Temp. Range
PACKAGE CODE
D: DIP-8
M: SOP-8
V: TSSOP-14
TEMPERATURE RANGE
C: -20 TO 80 °C
TAPE/REEL CODE
TL: Tape Left
V+
Vref
FB/SD
BLOCK DIAGRAM
BANDGAP
REFERENCE
1.25 V
+
-
DRIVE
DRIVE
OSC
GND
OSC
CONTROL
Q
Q
DRIVE
DRIVE
CAP +
VOUT
CAP -
May 1999 TOKO, Inc.
Page 1




TK75018VCTL pdf, 반도체, 판매, 대치품
TK75018
TYPICAL PERFORMANCE CHARACTERISTICS (CONT.)
SUPPLY CURRENT vs.
TEMPERATURE @ 5 V
3
2.8
2.6
2.4
2.2
2
-50
Note 6 Test Circuit
0 50 100
TEMPERATURE (°C)
SUPPLY CURRENT VS.
INPUT VOLTAGE
3 IL = 0
2
1
Note 6 Test Circuit
0
0 6 12
VIN (V)
AVERAGE INPUT CURRENT VS.
OUTPUT CURRENT
30
20
10
Note 6 Test Circuit
0
0 15 30
IOUT (mA)
100
90
80
70
60
50
40
30
20
10
0
-50
STANDBY CURRENT VS.
TEMPERATURE
Note 6 Test Circuit
0 50 100
TEMPERATURE (°C)
MAXIMUM SWITCH CURRENT vs.
TEMPERATURE
105
100
95
90
85
80
-50
CAP+ Current to GND
0 50 100
TEMPERATURE (°C)
Page 4
STANDBY CURRENT VS.
INPUT VOLTAGE
120
VPIN1 = 0 V
100
80
60
40
Note 6 Test Circuit
20
0 6 12
VIN (V)
2.65
2.60
REFERENCE VOLTAGE VS.
TEMPERATURE
2.55
2.50
2.45
2.40
2.35
-50
Note 6 Test Circuit
0 50 100
TEMPERATURE (°C)
STANDBY THRESHOLD VS.
TEMPERATURE
0.6
VPIN1
0.4
0.2
0
-50
Note 6 Test Circuit
0 50 100
TEMPERATURE (°C)
OSCILLATOR FREQUENCY VS.
TEMPERATURE
35
25
VIN = 5 V
15
-75
Note 6 Test Circuit
-25 25 75
TEMPERATURE (°C)
125
May 1999 TOKO, Inc.

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TK75018VCTL 전자부품, 판매, 대치품
TK75018
PIN DESCRIPTIONS (CONT.)
INPUT CAPACITOR CHARGING PINS (CAP+/CAP- )
The positive driving pin of CIN (CAP +) charges the positive
node of the capacitor to VIN during tCH and pulls it down to
ground during tDIS. The negative driving pin of CIN
(CAP -) pulls the negative node of the capacitor to ground
during tCH and is driven into the output during tDIS.
CIRCUIT GROUND (GND)
All potentials are referenced to this ground unless otherwise
noted.
OUTPUT VOLTAGE (VOUT)
In most applications, a capacitor must be placed from this
pin to ground to integrate the charge pulses delivered by
CIN. A minimum of ten times CIN is recommended. Since
the output voltage serves as the substrate inside the IC,
the design must ensure that this pin is never raised to a
higher potential than ground. This phenomenon will tend to
occur when a positive-supply-to-negative-supply load is
present at the converter output. A circuit, such as the one
shown in Figure 4, is recommended. Under normal
operation, the transistor will appear as a short circuit. But
the sink current will be cut off from the output pin if the
voltage starts to approach ground. The resistor is chosen
to keep the transistor saturated under all steady-state
operating conditions.
V+
IL
LOAD
V+
+
CIN
CAP +
GND
CAP - VOUT
COUT
+
FIGURE 4: POSITIVE REFERENCED LOAD
The equation below can be used to calculate the values of
the feedback resistors (R1 and R2) needed to achieve a
desired output voltage.
( )R2 = R1
|VOUT|
1.2 V
+1
where R1 24 k
REFERENCE VOLTAGE (Vref)
This pin provides a nominal 2.5 V buffered reference for
external use. Normal output current should be kept below
~160 µA.
OSCILLATOR PROGRAMMING (OSC)
This pin can be used to alter the nominal 25 kHz frequency
of the internal oscillator. An internal timing capacitor of
~150 pF is alternately charged during tCH and discharged
during tDIS with a 7 µA current source to fixed threshold
levels. Adding an external capacitor from the OSC pin to
ground will parallel the 150 pF capacitor to slow down the
clock period. Adding a small external capacitor from the
OSC pin to the CAP+ pin will source/sink extra charge into/
out-of the internal timing capacitor to speed up the transition
between thresholds and thereby raise the oscillator
frequency. It is recommended that, in the latter
configuration, the capacitor be kept below ~30 pF.
Synchronization of multiple TK75018s can be accomplished
by adding pull-up resistors from the OSC pin to the
reference voltage and using an open collector from an
NPN transistor to provide the discharge. The NPN is then
driven by a clocking pulse, and the same pulse can be
used to drive multiple devices in the same configuration.
It is not recommended to pull the OSC pin high with a low-
impedance source. To synchronize and regulate with
multiple devices, an external reference can be used as the
reference point for the error voltage divider, thus allowing
the internal reference to be used as the pull-up point for the
OSC pin.
INPUT VOLTAGE (V+)
The input voltage is used to charge CIN during the time tCH
during each clock period. CIN is then discharged into the
output capacitor during time tDIS. During tCH, the input
current will be approximately 2.2 times the output current.
During tDIS, the input current will be approximately 0.2
times the output current. A low ESR bypass capacitor will
average out the varying current seen by the input supply -
yielding an average input current of approximately 1.1
times the output current. The bypass capacitor should be
placed as near to the TK75018 as possible to disallow
inductive spikes on the supply rail of the IC. A minimum of
2 µF is recommended.
May 1999 TOKO, Inc.
Page 7

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부품번호상세설명 및 기능제조사
TK75018VCTL

SWITCHED CAPACITOR VOLTAGE CONVERTER WITH REGULATOR

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