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PDF TITAN19244 Data sheet ( Hoja de datos )
| Número de pieza | TITAN19244 | |
| Descripción | Semiconductor Solutions for High Speed Communications and Fiber Optic Applications | |
| Fabricantes | Infineon Technologies AG | |
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PRODUCT BRIEF
Semiconductor Solutions for
High Speed Communications
and Fiber Optic Applications
The Titan 19244 is a highly integrated single chip quad-
port STS-192 SONET/SDH TDM framer and pointer
processor device.
The Titan 19244 provides section, line, and path over-
head processing for quad STS-192/STM-64. The framer
itself takes four 10 Gbit/s (16-bit bus at 622 Mbit/s)
channels on the line side interface, which is compliant
with SFI-4 standard. The framer outputs four STS-192
SONET links on the system side. The system block dia-
gram on the next page depicts a configuration for a quad
OC-192 TDM framer and pointer processor application.
The Titan 19244 is compliant with SONET/SDH standards
ITU G.707, Bellcore GR-253, GR-1377, and ANSI T1.105.
Applications
■ SONET/SDH Digital Cross-Connects
■ SONET/SDH Terminal Multiplexers
■ Long Haul and Metro Network ADM
■ Dense Wave Division Multiplexers
■ SONET/SDH Add/Drop Multiplexers
■ Multi-Service Provisioning
Platforms
Features
■ Quad-port STS-192/STM-64
SONET/SDH framer and pointer
processor
■ Terminates and generates section
and line overhead layer for
STS-192/STM-64
■ Supports pointer processing at
STS-1 granularity for
STS-192/STM-64
■ Supports flexible concatenation of
payloads STS-2c, STS-3c, STS-4c,
STS-5c, … STS-12c, … STS-48c, …
STS-192c
■ Performs frame synchronous
scrambling and de-scrambling of
STS-192
T i t a n 1 9 2 4 4■ Drops/Insertssectionandline
overhead data bytes in the
receive/transmit direction onto an
■ Supports BER algorithm for Signal
Fail (SF) and Signal Degrade (SD)
■ Supports Terminal Loopback and
external bus on both line side &
Facility Loopback
system side
■ Supports Path REI error counting
■ Drops/Inserts Data
and Path RDI monitoring
Communications Channel (DCC)
■ Supports detection of path
bytes D1-D3, D4-D12 on a serial link
unequipped and payload label
■ Provides hardware assistance for
mismatch (Signal Label Mismatch)
APS via K1 & K2 bytes. A separate ■ Provides four 16-bit LVDS parallel
APS interrupt port is provided per
buses operating at 622 Mbit/s on
port for quad STS-192/STM-64
the line side for quad STS-192
■ Supports external timing mode
■ Compliant with SFI-4 standard on
■ Detects Severely Errored Framing
the Line Side Interface
(SEF), Loss Of Signal (LOS), Loss ■ Provides four 16-bit LVDS parallel
Of Frame (LOF), Loss Of Pointer
buses at 622 MHz (STS-192
(LOP), and Loss Of Clock (LOC)
SONET links) on the system side
■ Monitors Line Alarm Indication
■ Supports IEEE1149.1 JTAG testing
Signal (AIS-L), Line Remote Defect ■ Supports a 32-bit MPC860
Indication (RDI-L), and Line
Motorola microprocessor
Remote Error Indication (REI-L)
interface
■ Handles section trace identifier
(J0) and path trace identifier (J1)
■ Meets ITU G.707, GR-253,
GR-1377, and ANSI T1.105
processing
■ Calculates, monitors, and counts
■ 1413-pin flip-chip BGA package
the Section BIP-8 (B1), Line BIP-8N
(B2), and Path BIP-8 (B3) errors
Titan 19244
SONET/SDH Framer & Pointer Processor
Never stop thinking.
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