PDF TDA9810 Data sheet ( Hoja de datos )

Número de pieza	TDA9810
Descripción	Multistandard VIF-PLL with QSS-IF and AM demodulator
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS DATA SHEET TDA9810 Multistandard VIF-PLL with QSS-IF and AM demodulator Product speciﬁcation Supersedes data of 1997 Jun 19 File under Integrated Circuits, IC02 1999 May 07 1 page Philips Semiconductors Multistandard VIF-PLL with QSS-IF and AM demodulator Product speciﬁcation TDA9810 PINNING SYMBOL PIN DESCRIPTION Vi VIF1 Vi VIF2 TADJ 1 VIF differential input signal voltage 1 2 VIF differential input signal voltage 2 3 tuner AGC takeover point adjust TPLL CSAGC Vo AF LSWI 4 PLL loop ﬁlter 5 SIF AGC capacitor 6 AM audio frequency output voltage 7 L/L accent switch STD 8 standard switch Vo(vid) Vo QSS MUTE 9 composite video output voltage 10 single reference QSS output voltage 11 AM mute switch Vo CVBS 12 CVBS output signal voltage SYMBOL PIN DESCRIPTION Vi(vid) 13 video buffer input voltage LGATSWI 14 L/L accent gating switch CBL TAGC 15 black level detector 16 tuner AGC output AFC 17 AFC output VCO1 VCO2 GND 18 VCO1 reference circuit for 2fpc 19 VCO2 reference circuit for 2fpc 20 ground CVAGC VP Vi SIF1 Vi SIF2 21 VIF AGC capacitor 22 supply voltage 23 SIF differential input signal voltage 1 24 SIF differential input signal voltage 2 handbook, halfpage Vi VIF1 1 Vi VIF2 2 TADJ 3 TPLL 4 CSAGC 5 Vo AF 6 LSWI 7 TDA9810 24 Vi SIF2 23 Vi SIF1 22 VP 21 CVAGC 20 GND 19 VCO2 18 VCO1 STD 8 17 AFC Vo(vid) 9 Vo QSS 10 16 TAGC 15 CBL MUTE 11 14 LGATSWI Vo CVBS 12 13 Vi(vid) MHA712 handbook, halfpage Vi VIF1 1 24 Vi SIF2 Vi VIF2 2 23 Vi SIF1 TADJ 3 22 VP TPLL 4 CSAGC 5 21 CVAGC 20 GND Vo AF 6 19 VCO2 TDA9810T LSWI 7 18 VCO1 STD 8 17 AFC Vo(vid) 9 Vo QSS 10 MUTE 11 16 TAGC 15 CBL 14 LGATSWI Vo CVBS 12 13 Vi(vid) MHA722 Fig.2 Pin configuration SDIP24 package. 1999 May 07 5 Fig.3 Pin configuration SO24 package. 5 Page Philips Semiconductors Multistandard VIF-PLL with QSS-IF and AM demodulator Product speciﬁcation TDA9810 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Isource(12)(max) maximum AC and DC output source current 2.4 − B−1 −1 dB video bandwidth B/G and L standard; 8.4 11 CL < 20 pF; RL > 1 kΩ; AC load B−3 −3 dB video bandwidth B/G and L standard; 11 14 CL < 20 pF; RL > 1 kΩ; AC load − − − mA MHz MHz Measurements from IF input to CVBS output (pin 12; 330 Ω between pins 9 and 13, sound carrier off) Vo(CVBS)(p-p) ∆Vo(CVBS) Vo(CVBS)(sync) ∆Vo(CVBS) ∆Vo(bl)(BG) ∆Vo(bl)(L) Gdiff ϕdiff B−1 B−3 S/NW(video) S/N αIM(1.1) αIM(3.3) CVBS output signal voltage on pin 12 (peak-to-peak value) output signal voltage difference sync voltage level deviation of CVBS output signal voltage at B/G black level tilt in B/G standard black level tilt for worst case in L standard differential gain differential phase −1 dB video bandwidth −3 dB video bandwidth weighted signal-to-noise ratio for video unweighted signal-to-noise ratio intermodulation attenuation at ‘blue’ intermodulation attenuation at ‘yellow’ intermodulation attenuation at ‘blue’ intermodulation attenuation at ‘yellow’ note 9 difference between B/G and L standard B/G standard L standard 50 dB gain control 30 dB gain control gain variation; note 10 vision carrier modulated by test line (VITS) only; gain variation; note 10 “CCIR, line 330” “CCIR, line 330” CL < 20 pF; RL > 1 kΩ; AC load; B/G and L standard CL < 20 pF; RL > 1 kΩ; AC load; B/G and L standard see Fig.6 and note 11 see Fig.6 and note 11 f = 1.1 MHz; see Fig.7 and note 12 f = 1.1 MHz; see Fig.7 and note 12 f = 3.3 MHz; see Fig.7 and note 12 f = 3.3 MHz; see Fig.7 and note 12 1.7 − − − − − − − − − 5 7 56 49 58 60 58 59 2.0 2.3 − 10 1.35 − 1.35 − − 0.5 − 0.1 −1 − 1.9 25 12 6− 8− 60 − 53 − 64 − 66 − 64 − 65 − V % V V dB dB % % % deg MHz MHz dB dB dB dB dB dB 1999 May 07 11 11 Page

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