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PDF TDA9813T Data sheet ( Hoja de datos )

Número de pieza TDA9813T
Descripción VIF-PLL with QSS-IF and dual FM-PLL demodulator
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
DATA SHEET
TDA9813T
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
Product specification
Supersedes data of 1995 Oct 03
File under Integrated Circuits, IC02
1999 Sep 16

1 page




TDA9813T pdf
Philips Semiconductors
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
Product specification
TDA9813T
PINNING
SYMBOL PIN
DESCRIPTION
Vi VIF1
Vi VIF2
n.c.
1 VIF differential input signal voltage 1
2 VIF differential input signal voltage 2
3 not connected
TADJ
4 tuner AGC takeover adjust (TOP)
TPLL
CSAGC
n.c.
5 PLL loop filter
6 SIF-AGC capacitor
7 not connected
Vo CVBS
n.c.
8 CVBS output signal voltage
9 not connected
Vo AF1
Vo AF2
CDEC2
CDEC1
Vi FM2
Vi FM1
TAGC
10 audio voltage frequency output 1
11 audio voltage frequency output 2
12 decoupling capacitor 2
13 decoupling capacitor 1
14 sound intercarrier input voltage 2
15 sound intercarrier input voltage 1
16 tuner AGC output
Vo QSS
Vo(vid)
Vi(vid)
AFC
17 single reference QSS output voltage
18 composite video output voltage
19 video buffer input voltage
20 AFC output
VCO1
VCO2
Cref
GND
21 VCO1 reference circuit for 2fPC
22 VCO2 reference circuit for 2fPC
23 12VP reference capacitor
24 ground
CVAGC
VP
Vi SIF1
Vi SIF2
25 VIF-AGC capacitor
26 supply voltage
27 SIF differential input signal voltage 1
28 SIF differential input signal voltage 2
handbook, halfpage
Vi VIF1 1
Vi VIF2 2
n.c. 3
TADJ 4
TPLL 5
CSAGC 6
28 Vi SIF2
27 Vi SIF1
26 VP
25 C VAGC
24 GND
23 Cref
n.c. 7
22 VCO2
TDA9813T
Vo CVBS 8
21 VCO1
n.c. 9
20 AFC
Vo AF1 10
Vo AF2 11
CDEC2 12
CDEC1 13
Vi FM2 14
19 Vi(vid)
18 Vo(vid)
17 Vo QSS
16 TAGC
15 Vi FM1
MHA038
Fig.2 Pin configuration.
1999 Sep 16
5

5 Page





TDA9813T arduino
Philips Semiconductors
VIF-PLL with QSS-IF and
dual FM-PLL demodulator
Product specification
TDA9813T
SYMBOL
PARAMETER
CONDITIONS
MIN.
Vo
Vo(blB/G)
Gdiff
ϕdiff
B1
deviation of CVBS output
signal voltage at B/G
black level tilt in
B/G standard
differential gain
differential phase
1 dB video bandwidth
50 dB gain control
30 dB gain control
gain variation; note 9
“CCIR, line 330”
“CCIR, line 330”
CL < 20 pF; RL > 1 k;
AC load
5
B3
3 dB video bandwidth
CL < 20 pF; RL > 1 k;
7
AC load
S/N(W)
weighted signal-to-noise
ratio
see Fig.5 and note 10
56
S/N
unweighted signal-to-noise see Fig.5 and note 10
49
ratio
IMα1.1
intermodulation attenuation f = 1.1 MHz;
at ‘blue’
see Fig.6 and note 11
58
intermodulation attenuation f = 1.1 MHz;
at ‘yellow’
see Fig.6 and note 11
60
IMα3.3
intermodulation attenuation f = 3.3 MHz;
at ‘blue’
see Fig.6 and note 11
58
intermodulation attenuation f = 3.3 MHz;
at ‘yellow’
see Fig.6 and note 11
59
αpc(rms)
residual picture carrier
(RMS value)
fundamental wave and
harmonics
αH(sup)
suppression of video signal note 7a
harmonics
35
αH(spur)
PSRR
spurious elements
note 7b
power supply ripple rejection video signal; grey level;
at pin 8
see Fig.9
40
25
VIF-AGC detector (pin 25)
I25 charging current
note 9
discharging current
tresp
AGC response to an
note 12
increasing VIF step
AGC response to a
decreasing VIF step
0.75
15
Tuner AGC (pin 16)
Vi(rms)
IF input signal voltage for
minimum starting point of
tuner takeover (RMS value)
input at pins 1 and 2;
RTOP = 22 k; I16 = 0.4 mA
IF input signal voltage for
maximum starting point of
tuner takeover (RMS value)
input at pins 1 and 2;
RTOP = 0 ; I16 = 0.4 mA
50
Vo,16
permissible output voltage from external source; note 2
TYP.
2
1
6
8
60
53
64
66
64
65
2
40
28
1
20
0.05
2.2
2
100
MAX.
0.5
0.1
1
5
2
5
1.25
25
0.1
3.5
5
13.2
UNIT
dB
dB
%
%
deg
MHz
MHz
dB
dB
dB
dB
dB
dB
mV
dB
dB
dB
mA
µA
ms/dB
ms/dB
mV
mV
V
1999 Sep 16
11

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