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Número de pieza | TDA9850 | |
Descripción | I2C-bus controlled BTSC stereo/SAP decoder | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TDA9850 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! INTEGRATED CIRCUITS
DATA SHEET
TDA9850
I2C-bus controlled BTSC
stereo/SAP decoder
Preliminary specification
File under Integrated Circuits, IC02
1995 Jun 19
1 page Philips Semiconductors
I2C-bus controlled BTSC stereo/SAP decoder
Preliminary specification
TDA9850
COMPONENT LIST
Electrolytic capacitors ±20%; foil capacitors ±10%; resistors ±5%; unless otherwise specified; see Fig.1.
COMPONENT
VALUE
TYPE
REMARK
C1
10 µF
electrolytic
63 V
C2
470 nF
foil
C3
4.7 µF
electrolytic
63 V
C4
220 nF
foil
C5
10 µF
electrolytic
63 V; Ileak < 1.5 µA
C6
4.7 µF
electrolytic
63 V
C7
4.7 µF
electrolytic
63 V
C8
15 nF
foil
C9
10 µF
electrolytic
63 V ±10%
C10
10 µF
electrolytic
63 V ±10%
C11
1 µF
electrolytic
63 V
C12
1 µF
electrolytic
63 V
C13
47 nF
foil
±5%
C14
10 µF
electrolytic
63 V
C15
100 nF
foil
C16
4.7 µF
electrolytic
63 V
C17
100 nF
foil
C18
100 µF
electrolytic
16 V
C19
100 µF
electrolytic
16 V
CR
2.2 µF
electrolytic
63 V
CL
2.2 µF
electrolytic
63 V
R1 2.2 kΩ
R2 8.2 kΩ
±2%
R3 160 Ω
±2%
Q1
CSB503F58
radial leads
CSB503JF958
alternative as SMD
1995 Jun 19
5
5 Page Philips Semiconductors
I2C-bus controlled BTSC stereo/SAP decoder
Preliminary specification
TDA9850
CHARACTERISTICS
All voltages are measured relative to GND; VCC = 9 V; Rs = 600 Ω; RL = 10 kΩ; AC-coupled; CL = 2.5 nF; fi = 1 kHz;
Tamb = +25 °C; see Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Supply
VCC
Vripple(p-p)
ICC
Vref
αct
supply voltage
allowed supply voltage
ripple (peak-to-peak
value)
supply current
internal reference voltage
at pin Vref
crosstalk between bus
inputs and signal outputs
fi = 50 Hz to 100 kHz
notes 1 and 2
8.5
−
−
−
−
9 9.5
− 100
58 75
3.7 −
110 −
V
mV
mA
V
dB
Input level adjustment control
GLA input level adjustment
control
Gstep
Vi(rms)
step resolution
maximum input voltage
level (RMS value)
Zi input impedance
Stereo decoder
MPXL+R
input voltage level for
100% modulation L + R;
25 kHz deviation
(RMS value)
input level adjusted via
I2C-bus (L + R;
fi = 300 Hz); monitoring
OUTL or OUTR
MPXL−R
input voltage level for
100% modulation L − R;
50 kHz deviation
(peak value)
MPX(max)
maximum headroom for fmod < 15 kHz;
L + R, L, R
THD < 15%
MPXpilot
nominal stereo pilot
voltage level (RMS value)
STon(rms)
pilot threshold voltage
stereo on (RMS value)
data STS = 1
data STS = 0
SToff(rms)
pilot threshold voltage
stereo off (RMS value)
data STS = 1
data STS = 0
Hys hysteresis
OUTL+R
output voltage level for
100% modulation L + R at
OUTL, OUTR
input level adjusted via
I2C-bus (L + R;
fi = 300 Hz); monitoring
OUTL or OUTR
−3.5
−
2
29.5
−
−
9
−
−
−
15
10
−
480
− +4.0
0.5 −
−−
35 40.5
250 −
707 −
−−
50 −
− 35
− 30
−−
−−
2.5 −
500 520
dB
dB
V
kΩ
mV
mV
dB
mV
mV
mV
mV
mV
dB
mV
1995 Jun 19
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet TDA9850.PDF ] |
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