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부품번호 | TEA1062M1 기능 |
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기능 | Low voltage transmission circuits with dialler interface | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 28 페이지수
INTEGRATED CIRCUITS
DATA SHEET
TEA1062; TEA1062A
Low voltage transmission circuits
with dialler interface
Product specification
Supersedes data of 1996 Dec 04
File under Integrated Circuits, IC03
1997 Sep 03
Philips Semiconductors
Low voltage transmission circuits with
dialler interface
Product specification
TEA1062; TEA1062A
PINNING
SYMBOL
LN
GAS1
GAS2
QR
GAR
MIC−
MIC+
STAB
VEE
IR
DTMF
MUTE
VCC
REG
AGC
SLPE
PIN DESCRIPTION
1 positive line terminal
2 gain adjustment; transmitting
amplifier
3 gain adjustment; transmitting
amplifier
4 non-inverting output; receiving
amplifier
5 gain adjustment; receiving
amplifier
6 inverting microphone input
7 non-inverting microphone input
8 current stabilizer
9 negative line terminal
10 receiving amplifier input
11 dual-tone multi-frequency input
12 mute input (see note 1)
13 positive supply decoupling
14 voltage regulator decoupling
15 automatic gain control input
16 slope (DC resistance) adjustment
Note
1. Pin 12 is active HIGH (MUTE) for TEA1062.
handbook, halfpage
LN 1
16 SLPE
GAS1 2
15 AGC
GAS2 3
QR 4
GAR 5
14 REG
TEA1062A
13 VCC
12 MUTE
MIC 6
11 DTMF
MIC 7
10 IR
STAB 8
9 VEE
MBA354 - 1
Fig.2 Pin configuration for TEA1062A.
1997 Sep 03
4
4페이지 Philips Semiconductors
Low voltage transmission circuits with
dialler interface
Product specification
TEA1062; TEA1062A
Sidetone suppression
The anti-sidetone network, R1//Zline, R2, R3, R8, R9 and
Zbal, (see Fig.4) suppresses the transmitted signal in the
earpiece. Maximum compensation is obtained when the
following conditions are fulfilled:
R9 × R2
=
R
1
×
R
3
+
R-R----88-----+×-----ZZ----bb---aa--ll
(1)
-Z---b---a-Z--l--b-+--a--l-R----8-- = -Z---l--i-n-Z--e--l-i-+n---e--R-----1-
(2)
If fixed values are chosen for R1, R2, R3 and R9, then
condition (1) will always be fulfilled when |R8//Zbal| << R3.
To obtain optimum sidetone suppression, condition (2) has
to be fulfilled which results in:
Zbal = RR-----81-- × Zline = k × Zline
Where k is a scale factor; k = RR-----81--
The scale factor k, dependent on the value of R8, is
chosen to meet the following criteria:
• compatibility with a standard capacitor from the E6 or
E12 range for Zbal
• Zbal//R8 << R3 fulfilling condition (a) and thus
ensuring correct anti-sidetone bridge operation
• Zbal + R8 >> R9 to avoid influencing the transmit gain.
In practise Zline varies considerably with the line type and
length. The value chosen for Zbal should therefore be for
an average line length thus giving optimum setting for
short or long lines.
EXAMPLE
The balance impedance Zbal at which the optimum
suppression is present can be calculated by:
Suppose Zline = 210 Ω + (1265 Ω//140 nF) representing a
5 km line of 0.5 mm diameter, copper, twisted-pair cable
matched to 600 Ω (176 Ω/km; 38 nF/km).
When k = 0.64 then R8 = 390 Ω;
Zbal = 130 Ω + (820 Ω//220 nF).
The anti-sidetone network for the TEA1060 family shown
in Fig.4 attenuates the signal received from the line by
32 dB before it enters the receiving amplifier.
The attenuation is almost constant over the whole
audio-frequency range.
Figure 5 shows a conventional Wheatstone bridge
anti-sidetone circuit that can be used as an alternative.
Both bridge types can be used with either resistive or
complex set impedances. (More information on the
balancing of anti-sidetone bridges can be obtained in our
publication “Applications Handbook for Wired telecom
systems, IC03b”, order number 9397 750 00811.)
1997 Sep 03
7
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다운로드 | [ TEA1062M1.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
TEA1062M1 | Low voltage transmission circuits with dialler interface | NXP Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |