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부품번호 P89V51RD2 기능
기능 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
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P89V51RD2 데이터시트, 핀배열, 회로
P89V51RD2
8-bit 80C51 5 V low power 64 kB Flash microcontroller
with 1 kB RAM
Rev. 01 — 01 March 2004
Product data
1. General description
The P89V51RD2 is an 80C51 microcontroller with 64 kB Flash and 1024 bytes of
data RAM.
A key feature of the P89V51RD2 is its X2 mode option. The design engineer can
choose to run the application with the conventional 80C51 clock rate (12 clocks per
machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice
the throughput at the same clock frequency. Another way to benefit from this feature
is to keep the same performance by reducing the clock frequency by half, thus
dramatically reducing the EMI.
The Flash program memory supports both parallel programming and in serial
In-System Programming (ISP). Parallel programming mode offers gang-programming
at high speed, reducing programming costs and time to market. ISP allows a device
to be reprogrammed in the end product under software control. The capability to
field/update the application firmware makes a wide range of applications possible.
The P89V51RD2 is also In-Application Programmable (IAP), allowing the Flash
program memory to be reconfigured even while the application is running.
2. Features
s 80C51 Central Processing Unit
s 5 V Operating voltage from 0 to 40 MHz
s 64 kB of on-chip Flash program memory with ISP (In-System Programming) and
IAP (In-Application Programming)
s Supports 12-clock (default) or 6-clock mode selection via software or ISP
s SPI (Serial Peripheral Interface) and enhanced UART
s PCA (Programmable Counter Array) with PWM and Capture/Compare functions
s Four 8-bit I/O ports with three high-current Port 1 pins (16 mA each)
s Three 16-bit timers/counters
s Programmable Watchdog timer (WDT)
s Eight interrupt sources with four priority levels
s Second DPTR register
s Low EMI mode (ALE inhibit)
s TTL- and CMOS-compatible logic levels




P89V51RD2 pdf, 반도체, 판매, 대치품
Philips Semiconductors
5. Pinning information
5.1 Pinning
P89V51RD2
8-bit microcontrollers with 80C51 core
CEX2/MOSI/P1.5 7
CEX3/MISO/P1.6 8
CEX4/SCK/P1.7 9
RST 10
RXD/P3.0 11
NC 12
TXD/P3.1 13
INT0/P3.2 14
INT1/P3.3 15
T0/P3.4 16
T1/P3.5 17
P89V51RD2FA
Fig 2. PLCC44 pin configuration.
39 P0.4/AD4
38 P0.5/AD5
37 P0.6/AD6
36 P0.7/AD7
35 EA
34 NC
33 ALE/PROG
32 PSEN
31 P2.7/A15
30 P2.6/A14
29 P2.5/A13
002aaa810
9397 750 12964
Product data
Rev. 01 — 01 March 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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P89V51RD2 전자부품, 판매, 대치품
Philips Semiconductors
P89V51RD2
8-bit microcontrollers with 80C51 core
5.2 Pin description
Table 3:
Symbol
P0.0 to
P0.7
P89V51RD2 pin description
Pin
DIP40
TQFP44 PLCC44
39-32
37-30
43-36
P1.0 to
P1.7
1-8
40-44, 1-3 2-9
P1.0
P1.1
P1.2
P1.3
1
2
3
4
P1.4
P1.5
P1.6
P1.7
5
6
7
8
40 2
41 3
42 4
43 5
44 6
17
28
39
Type
Description
I/O Port 0: Port 0 is an 8-bit open drain bi-directional I/O
port. Port 0 pins that have ‘1’s written to them float, and
in this state can be used as high-impedance inputs.
Port 0 is also the multiplexed low-order address and
data bus during accesses to external code and data
memory. In this application, it uses strong internal
pull-ups when transitioning to ‘1’s. Port 0 also receives
the code bytes during the external host mode
programming, and outputs the code bytes during the
external host mode verification. External pull-ups are
required during program verification or as a general
purpose I/O port.
I/O with
Port 1: Port 1 is an 8-bit bi-directional I/O port with
internal pull-up internal pull-ups. The Port 1 pins are pulled high by the
internal pull-ups when ‘1’s are written to them and can
be used as inputs in this state. As inputs, Port 1 pins that
are externally pulled LOW will source current (IIL)
because of the internal pull-ups. P1.5, P1.6, P1.7 have
high current drive of 16 mA. Port 1 also receives the
low-order address bytes during the external host mode
programming and verification.
I/O T2: External count input to Timer/Counter 2 or Clock-out
from Timer/Counter 2
I T2EX: Timer/Counter 2 capture/reload trigger and
direction control
I ECI: External clock input. This signal is the external
clock input for the PCA.
I/O CEX0: Capture/compare external I/O for PCA Module 0.
Each capture/compare module connects to a Port 1 pin
for external I/O. When not used by the PCA, this pin can
handle standard I/O.
I/O SS: Slave port select input for SPI
CEX1: Capture/compare external I/O for PCA Module 1
I/O MOSI: Master Output Slave Input for SPI
CEX2: Capture/compare external I/O for PCA Module 2
I/O MISO: Master Input Slave Output for SPI
CEX3: Capture/compare external I/O for PCA Module 3
I/O SCK: Master Output Slave Input for SPI
CEX4: Capture/compare external I/O for PCA Module 4
9397 750 12964
Product data
Rev. 01 — 01 March 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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