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기능 8-bit microcontroller with on-chip CAN
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P8xC592 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
P8xC592
8-bit microcontroller
with on-chip CAN
Product specification
Supersedes data of January 1995
File under Integrated Circuits, IC18
1996 Jun 27




P8xC592 pdf, 반도체, 판매, 대치품
Philips Semiconductors
8-bit microcontroller with on-chip CAN
4 BLOCK DIAGRAM
Product specification
P8xC592
1996 Jun 27
4

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P8xC592 전자부품, 판매, 대치품
Philips Semiconductors
8-bit microcontroller with on-chip CAN
Product specification
P8xC592
Table 1 Pin description for single function pins (SOT188-2; see note 1)
SYMBOL PIN
DESCRIPTION
VDD
STADC
2 Power supply, digital part (+5 V). For normal operation and power reduced modes.
3 Start ADC operation. Input starting analog-to-digital conversion (note 2). This pin must not float.
PWM0
4 Pulse width modulation output 0.
PMW1
5 Pulse width modulation output 1.
EW 6 Enable Watchdog Timer (WDT): enable for T3 Watchdog Timer and disable Power-down mode.
This pin must not float.
RST
15 Reset: input to reset the P8xC592 (note 3).
CVSS
XTAL2
22 CAN ground potential for the CAN transmitter outputs.
33 Crystal pin 2: output of the inverting amplifier that forms the oscillator.
When an external clock oscillator is used this pin is left open-circuit.
XTAL1
34 Crystal pin 1: input to the inverting amplifier that forms the oscillator, and input to the internal clock
generator. Receives the external clock oscillator signal, when an external oscillator is used.
VSS
PSEN
35 Ground, digital part.
44 Program Store Enable: Read strobe to external Program Memory (active LOW).
Drive: 8 × LSTTL inputs.
ALE 45 Address Latch Enable: latches the Low-byte of the address during accesses to external memory
(note 4). Drive: 8 × LSTTL inputs; handles CMOS inputs without an external pull-up.
EA
REF
CRX1
CRX0
46 External Access input. See note 5.
55 12AVDD reference voltage output respectively input (note 6).
56 Inputs from the CAN-bus line to the differential input comparator of the on-chip CAN-controller
57 (note 7).
AVREF
AVREF+
AVSS
AVDD
58 Low-end of ADC (analog-to-digital) conversion reference resistor.
59 High-end of ADC (analog-to-digital) conversion reference resistor (note 8).
60 Ground, analog part. For ADC, CAN receiver and reference voltage.
61 Power supply, analog part (+5 V). For ADC, CAN receiver and reference voltage.
Notes
1. To avoid a ‘latch up’ effect at power-on: VSS 0.5 V < ‘voltage on any pin at any time’ < VDD + 0.5 V.
2. Triggered by a rising edge. ADC operation can also be started by software.
3. RST also provides a reset pulse as output when timer T3 overflows or after a CAN wake-up from Power-down.
4. ALE is activated every six oscillator periods. During an external data memory access one ALE pulse is skipped.
5. See Section 7.1, Table 3 for EA operation. For P83Cxxx microcontrollers specified with the option ‘ROM-code
protection’, the EA pin is latched during reset and is ‘don't care’ after reset, regardless of whether the ROM-code
protection is selected or not.
1996 Jun 27
7

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