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SLVU2.8 데이터시트 PDF




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부품번호 SLVU2.8 기능
기능 Low Voltage EPD TVS Diodes For ESD and Latch-Up Protection
제조업체 Semtech Corporation
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SLVU2.8 데이터시트, 핀배열, 회로
PROTECTION PRODUCTS
Description
The SLV series of transient voltage suppressors are
designed to protect low voltage, state-of-the-art CMOS
semiconductors from transients caused by electro-
static discharge (ESD), cable discharge events (CDE),
lightning and other induced voltage surges.
The devices are constructed using Semtech’s propri-
etary EPD process technology. The EPD process pro-
vides low standoff voltages with significant reductions
in leakage currents and capacitance over silicon-
avalanche diode processes. The SLVU2.8 features an
integrated low capacitance compensation diode that
allows the device to be configured to protect one
unidirectional line or, when paired with a second
SLVU2.8, two high-speed line pairs. The low capaci-
tance design of the SLVU2.8 means signal integrity is
preserved in high-speed applications such as 10/100
Ethernet.
The SLVU2.8 is in an SOT23 package and has a low
2.8 volt working voltage. It is specifically designed to
protect low voltage components such as Ethernet
transceivers, laser diodes, ASICs, and high-speed RAM.
The low clamping voltage of the SLVU2.8 minimizes the
stress on the protected IC.
The SLV series TVS diodes will exceed the surge re-
quirements of IEC 61000-4-2, Level 4.
SLVU2.8
Low Voltage EPD TVS™ Diode
For ESD and Latch-Up Protection
Features
u 400 Watts peak pulse power (tp = 8/20µs)
u Transient protection for high speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp = 5/50ns)
IEC 61000-4-5 (Lightning) 24A (tp = 8/20µs)
u One device protects one unidirectional line
u Two devices protect two high-speed line pairs
u Low capacitance
u Low leakage current
u Low operating and clamping voltages
u Solid-state EPD TVS process technology
Mechanical Characteristics
u JEDEC SOT23 package
u Molding compound flammability rating: UL 94V-0
u Marking : U2.8
u Packaging : Tape and Reel per EIA 481
Applications
u 10/100 Ethernet
u WAN/LAN Equipment
u Switching Systems
u Desktops, Servers, Notebooks & Handhelds
u Laser Diode Protection
u Base Stations
Circuit Diagram
Schematic & PIN Configuration
3
1
Revision 9/2000
2
1
3
2
SOT23 (Top View)
1 www.semtech.com




SLVU2.8 pdf, 반도체, 판매, 대치품
SLVU2.8
PROTECTION PRODUCTS
Applications Information
Device Connection Options
SLVU2.8 Circuit Diagram
Electronic equipment is susceptible to transient distur-
bances from a variety of sources including: ESD to an
open connector or interface, direct or nearby lightning
strikes to cables and wires, and charged cables “hot
plugged” into I/O ports. The SLVU2.8 is designed to
protect sensitive components from damage and latch-
up which may result from such transient events. The
SLVU2.8 can be configured to protect either one
unidirectional line or two (one line pair) high-speed data
lines. The options for connecting the devices are as
follows:
13
2
Protection of one unidirectional line
1 . Protection of one unidirectional I/O line: Protec-
tion of one data line is achieved by connecting pin
3 to the protected line, and pins 1 and 2 to ground.
This connection option will allow the device to
operate on lines with positive polarity signal transi-
tions (during normal operation). In this configura-
tion, the device adds a maximum loading capaci-
tance of 100pF. During positive duration tran-
sients, the internal TVS diode will be reversed
biased and will act in the avalanche mode, con-
ducting the transient current from pin 3 to 1. The
transient will be clamped at or below the rated
clamping voltage of the device. For negative
duration transients, the internal steering diode is
forward biased, conducting the transient current
from pin 2 to 3. The transient is clamped below
the rated forward voltage drop of the diode.
Low capacitance protection of one high-speed line
pair
2. Low capacitance protection of one differential
line pair: Protection of a high-speed differential line
pair is achieved by connecting two devices in anti-
parallel. Pin 1 of the first device is connected to
line 1 and pin 2 is connected to line 2. Pin 2 of the
second device is connected to line 1 and pin 1 is
connected to line 2 as shown. Pin 3 must be left
open on both devices. During negative duration
transients, the first device will conduct from pin 2
to 1. The steering diode conducts in the forward
direction while the TVS will avalanche and conduct
in the reverse direction. During positive transients,
the second device will conduct in the same man-
ner. In this configuration, the total loading capaci-
tance is the sum of the capacitance (between pins
1 and 2) of each device (typically <10pF) making
this configuration suitable for high-speed interfaces
such as 10/100 Ethernet (See application note
SI98-02).
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
l Place the SLVU2.8 near the input terminals or
connectors to restrict transient coupling.
l Minimize the path length between the TVS and the
protected line.
l Minimize all conductive loops including power and
ground loops.
l The ESD transient return path to ground should be
kept as short as possible.
l Never run critical signals near board edges.
l Use ground planes whenever possible.
ã 2000 Semtech Corp.
4
www.semtech.com

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SLVU2.8 전자부품, 판매, 대치품
PROTECTION PRODUCTS
Outline Drawing - SOT23
SLVU2.8
Land Pattern - SOT23
Note 1 : Grid placement courtyard is 8 x 8 elements (4mm x
4mm) in accordance with the international grid detailed in IEC
Publication 97.
ã 2000 Semtech Corp.
7
www.semtech.com

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관련 데이터시트

부품번호상세설명 및 기능제조사
SLVU2.8

Low Voltage EPD TVS Diodes For ESD and Latch-Up Protection

Semtech Corporation
Semtech Corporation
SLVU2.8-4

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