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PDF RFT1P06E Data sheet ( Hoja de datos )

Número de pieza RFT1P06E
Descripción 1.4A/ 60V/ 0.285 Ohm/ ESD Rated/ P-Channel Power MOSFET
Fabricantes Intersil Corporation 
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Data Sheet
RFT1P06E
August 1999 File Number 4495.1
1.4A, 60V, 0.285 Ohm, ESD Rated,
P-Channel Power MOSFET
These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49044.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFT1P06E
SOT-223
R1P06E
NOTE: RFT1P06E is available only in tape and reel.
Features
• 1.4A, 60V
• rDS(ON) = 0.285
• 2kV ESD Protected
• Temperature Compensating PSPICE® Model
• SPICE Thermal Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 150oC Operating Temperature
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
DRAIN
(FLANGE)
SOT-223
SOURCE
DRAIN
GATE
4-171
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999.

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RFT1P06E pdf
RFT1P06E
Typical Performance Curves (Continued)
800
CISS
600
VGS = 0V, f = 1MHz
400 CISS = CGS + CGD
CRSS = CGD
COSS = CDS + CGD
200 COSS
CRSS
0
0 -10 -20 -30 -40 -50 -60
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
-10
WAVEFORMS IN
DESCENDING ORDER:
-8 ID = -1.4A
ID = -1.0A
ID = -0.5A
-6
VDD = -30V
-4
-2
0
0 5 10 15 20
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
RG
0V
tP
-VGS
VDS
L
DUT
-
VDD
+
IAS
0.01
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
tAV
0
VDD
IAS
tP
BVDSS
VDS
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
VGS
IG(REF)
VDS
RL
DUT
-
VDD
+
FIGURE 16. GATE CHARGE TEST CIRCUIT
Qg(TH)
0
VDS
VGS = -2V
-VGS
VDD
Qg(-10)
VGS = -10V
VGS = -20V
0
IG(REF)
Qg(TOT)
FIGURE 17. GATE CHARGE WAVEFORM
4-175

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