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PBL386141 데이터시트 PDF




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부품번호 PBL386141 기능
기능 Subscriber Line Interface Circuit
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PBL386141 데이터시트, 핀배열, 회로
Preliminary Information
February 2000
PBL 386 14/1
Subscriber Line
Interface Circuit
Description
The PBL 386 14/1 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in ISDN Network Terminal Adapters and other short loop
telecommunication equipment which often are remote powered, and by that, the
available power is limited. The PBL 386 14/1 has been optimized for low total line
interface cost, low power and requires a minimum of external components.
The PBL 386 14/1 has constant current feed, programmable to max 30mA. The SLIC
uses a first battery voltage for On-hook . A second battery voltage is used for
Off-hook and must be connected, to reduce short loop power dissipation. The SLIC
automatically switches between the two battery supply voltages without need for
external components or external control. The loop current controls the switching
between On-hook and Off-hook battery.
The SLIC incorporates loop current, ground key and ring trip detection functions.
The PBL 386 14/1 is compatible with loop start signalling. Two- to four-wire and
four- to two-wire voice frequency (vf) signal conversion is accomplished by the SLIC
in conjunction with either a conventional CODEC/filter or with a programmable
CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable line terminating
impedance could be complex or real to fit every market. Longitudinal voltages are
suppressed by a feedback loop in the SLIC and the longitudinal balance specifica-
tions meet Bellcore TR909 requirements.
The PBL 386 14/1 package is a very PCB space efficient 28-pin SSOP.
DT
DR
TIPX
RINGX
HP
TS
Two-wire
Interface
Ring Trip
Comparator
Ground Key
Detector
Line Feed
Controller
and
Longitudinal
Signal
Suppression
Ring Relay
Driver
Input
Decoder and
Control
RRLY
C1
C2
C3
VCC
DET
PSG
LP
REF
PLC
Applications
• ISDN Network terminals
• Shortloop applications
Key Features
• Small footprint with SSOP package
• On-hook and Off-hook battery with
automatic switching, controlled by
loop current
• On-hook battery current is limited
to 6 mA
• 37 mW on-hook power dissipation in
active state
• Metering 0.5 Vrms (0.7 Vpeak)
• Adaptive Overhead Voltage
The overhead voltage follows
1Vpeak<signals<2.5Vpeak
• Battery supply as low as -10V
• Only +5V in addition to GND
and battery (VEE optional)
• Open loop voltage tracks On-hook
battery
• Full longitudinal current capability
during On-hook
• 43.5V open loop voltage @ -48V
battery feed
• Automatic compensation for
line leakage up to 5 mA
• On-hook transmission
• Programmable loop & ring-trip
detector threshold
• Ground key detector
• Analog temperature guard with status
exclusively viewed at detector output
• Integrated Ring Relay Driver
• Linevoltage measurement
VBAT2
VBAT
BGND
Off-hook
Detector
VF Signal
Transmission
PLD
AGND
VTX
RSN
VEE
(optional)
PBL 386 14/1
Figure 1. Block diagram.
Package: 28-pin SSOP
1




PBL386141 pdf, 반도체, 판매, 대치품
PBL 386 14/1
Parameter
Four-wire to longitudinal balance, BFLE
Ref
fig
4
Two-wire return loss, r
TIPX idle voltage, VTi
RINGX idle voltage, VRi
|VTR |
Four-wire transmit port (VTX)
Overload level, VTXO
Off-hook, IL 10mA
On-hook, IL 5mA
Output offset voltage, VTX
Output impedance, zTX
5
Four-wire receive port (RSN)
Receive summing node (RSN) dc voltage
Receive summing node (RSN) impedance
Receive summing node (RSN)
current (IRSN) to metallic loop current (IL)
gain,αRSN
Frequency response
Two-wire to four-wire, g2-4
6
Conditions
active state
BFLE = 20 • Log
ERX
VLo
0.2 kHz < f < 3.4 kHz
r = 20 • Log |ZTR + ZL|
|ZTR - ZL|
0.2 kHz < f < 0.5 kHz
0.5 kHz < f < 1.0 kHz
1.0 kHz < f < 3.4 kHz, Note 3
active normal, IL = 0
active normal, IL = 0
active, IL = 0
Load impedance > 20 k,
1% THD, Note 4
0.2 kHz < f < 3.4 kHz
IRSN = 0 mA
0.2 kHz < f < 3.4 kHz
0.3 kHz < f < 3.4 kHz
Min Typ Max
40 58
25
27
23
- 1.3
VBat +3.1
|VBat +5.5| |VBat + 4.5|
0.5
0.5
-60
5
60
20
GND +25
10 50
400
relative to 0 dBm, 1.0 kHz. ERX = 0 V
0.3 kHz < f < 3.4 kHz
-0.15
f = 8.0 kHz, 12 kHz, 16 kHz
-0.5
0
0.15
0.1
Unit
dB
dB
dB
dB
V
V
V
VPeak
VPeak
mV
mV
ratio
dB
dB
C
VLo
RLT
RLR
TIPX
VTX
VTR PBL 386 14/1
RINGX RSN
RT
RRX
E RX
Figure 4. Metallic to longitudinal and
four-wire to longitudinal balance
1
ωC
<<
150
,
RLT
= RLR = RL
/2 =300
RT = 120 k, RRX = 120 k
RL
EL
4
C
ILDC
TIPX
VTX
PBL 386 14/1
RINGX RSN
Figure 5. Overload level, VTXO, four-wire
transmit port
1
RT
VTXO
ωC
<<
R,
L
R
L
=
600
RT = 120 k, RRX = 120 k
RRX

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PBL386141 전자부품, 판매, 대치품
PBL 386 14/1
Notes
1. The overload level is automatically expanded to 2.5 VPeak
when the signal level > 1.0 VPeak and is specified at the
two-wire port with the signal source at the four-wire
receive port.
2. The two-wire impedance is programmable by selection of
external component values according to:
ZTR = ZT/|G2-4S αRSN| where:
ZTR = impedance between the TIPX and RINGX
terminals
ZT = programming network between the VTX and RSN
terminals
G2-4S = transmit gain, nominally = -0.5
α RSN = receive current gain, nominally = 400 (current
defined as positive flowing into the receivesumm-
ing node, RSN, and when flowing from tip to ring).
3. Higher return loss values can be achieved by adding a
reactive component to RT, the two-wire terminating
impedance programming resistance, e.g. by dividing RT
into two equal halves and connecting a capacitor from the
common point to ground.
4. The overload level is automatically expanded as needed up
to 1.25 VPeak when the signal level >0.5 VPeak and is
specified at the four-wire transmit port, VTX, with the signal
source at the two-wire port. Note that the gain from the
two-wire port to the four-wire transmit port is G2-4S = -0.5.
5. Secondary protection resistors RF impact the insertion loss.
The specified insertion loss is for RF = 0.
6. The specified insertion loss tolerance does not include
errors caused by external components.
7. The level is specified at the four-wire receive port and
referenced to a 600 programmed two-wire impedance
level.
8. The two-wire idle noise is specified with the four-wire
receive port grounded (ERX = 0; see figure 6).
The four-wire idle noise at VTX is the two-wire value -6 dB
and is specified with the two-wire port terminated in 600
(RL). The noise specification is referenced to a 600
programmed two-wire impedance level at VTX. The four-
wire receive port is grounded (ERX = 0).
9. The VBat2 voltage is optimized for RL=600 with a
programmed linecurrent, IL=27 mA. This gives VBat2=22 V at
the terminal (e.g. calculated to 21.9V).
7

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