Datasheet.kr   

PBL386302QNS 데이터시트 PDF




Ericsson에서 제조한 전자 부품 PBL386302QNS은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 PBL386302QNS 자료 제공

부품번호 PBL386302QNS 기능
기능 Subscriber Line Interface Circuit
제조업체 Ericsson
로고 Ericsson 로고


PBL386302QNS 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 16 페이지수

미리보기를 사용할 수 없습니다

PBL386302QNS 데이터시트, 핀배열, 회로
March 2000
PBL 386 30/2
Subscriber Line
Interface Circuit
Description
The PBL 386 30/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in Digital Loop Carrier, FITL and other telecommunications equipment.
The PBL 386 30/2 has been optimized for low total line interface cost and a high
degree of flexibility in different applications.
The PBL 386 30/2 emulates resistive loop feed, programmable between 2x50
and 2x900 , with short loop current limiting adjustable to max 45 mA. In the current
limited region the loop feed is nearly constant current with a slight slope
corresponding to 2x30k.
A second lower battery voltage may be connected to the device to reduce short
loop power dissipation. The SLIC automatically switches between the two battery
supply voltages without need for external components or external control.
The SLIC incorporates loop current and ring trip detection functions.
The PBL 386 30/2 is compatible with loop start signaling.
Two- to four-wire and four- to two-wire voice frequency (VF) signal conversion is
accomplished by the SLIC in conjunction with either a conventional CODEC/filter or
with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable
two-wire impendance, complex or real, is set by a simple external network.
Longitudinal voltages are suppressed by a feedback loop in the SLIC and the
longitudinal balance specifications meet the DLC requirements.
The PBL 386 30/2 package options are 24-pin SSOP, 24-pin SOIC and
28-pin PLCC.
DT
DR
TIPX
RINGX
HP
VCC
VBAT2
VBAT
AGND
BGND
Two-wire
Interface
Ring Trip
Comparator
Line Feed
Controller
and
Longitudinal
Signal
Suppression
Off-hook
Detector
VF Signal
Transmission
Ring Relay
Driver
Input
Decoder
and
Control
RRLY
C1
C2
DET
POV
PSG
PLC
LP
PLD
REF
VTX
RSN
Key Features
• 24-pin SSOP package
• High and low battery supply with
automatic switching
• 65 mW on-hook power dissipation in
active state
• On-hook transmission
• Long loop battery feed tracks Vbat for
maximum line voltage
• Only +5 V feed in addition to battery
• Selectable transmit gain (1x or 0.5x)
• No power-up sequence
• Programmable signal headroom
• 43V open loop voltage @ -48V battery
feed
• Constant loop voltage for line leakage
<5 mA (RLeak ~ >10 k@ -48V)
• Full longitudinal current capability
during on-hook state
• Analog over temperature protection
permits transmission while the
protection circuit is active
• Integrated Ring Relay Driver
• -40°C to +85°C ambient temperature
range
PBL 386 30/2
Figure 1. Block diagram.
PTG
24-pin SOIC, 24-pin SSOP, 28-pin PLCC
1




PBL386302QNS pdf, 반도체, 판매, 대치품
PBL 386 30/2
Parameter
Four-wire to longitudinal balance, BFLE
Ref
fig Conditions
4 0.2 kHz < f < 3.4 kHz
BFLE = 20 · Log
ERX
VLo
Min
40
Two-wire return loss, r
r = 20 · Log |ZTR + ZL|
|Z - Z |
TR L
TIPX idle voltage, VTi
RINGX idle voltage, VRi
V
TR
Four-wire transmit port (VTX)
Overload level, VTXO, IL > 18mA
5
On-hook, IL < 5mA
Output offset voltage, VTX
Output impedance, z
TX
Four-wire receive port (RSN)
Receive summing node (RSN) DC voltage
Receive summing node (RSN) impedance
Receive summing node (RSN)
current (I ) to metallic loop current (I )
RSN
L
gain,αRSN
Frequency response
Two-wire to four-wire, g2-4
6
0.2 kHz < f < 1.0 kHz
1.0 kHz < f < 3.4 kHz, Note 3
active, IL < 5 mA
active, IL < 5 mA
active, I < 5 mA
L
Load impedance > 20 k,
1% THD, Note 4
0.2 kHz < f < 3.4 kHz
IRSN = -55 µA
0.2 kHz < f < 3.4 kHz
0.3 kHz < f < 3.4 kHz
30
20
2.7
1.1
-100
1.15
relative to 0 dBm, 1.0 kHz. ERX = 0 V
0.3 kHz < f < 3.4 kHz
f = 8.0 kHz, 12 kHz, 16 kHz
-0.20
-1.0
Typ Max
50
35
22
- 1.3
VBat +3.0
V +4.3
Bat
0 100
15 50
1.25 1.35
8 20
200
0.10
0.1
Unit
dB
dB
dB
V
V
V
VPeak
VPeak
mV
V
ratio
dB
dB
C
VLo
RL
EL
4
RLT
RLR
C
TIPX
VTX
VTR PBL 386 30/2
RINGX RSN
RT
RRX
E RX
TIPX
VTX
ILDC PBL 386 30/2
RINGX RSN
RT VTXO
RRX
Figure 4. Metallic to longitudinal and four-
wire to longitudinal balance
1
ωC
<<
150
,
R
LT
=
R
LR
=
R
L
/2
=300
RT = 120 k, RRX = 60 k
Figure 5. Overload level, VTXO, four-wire
transmit port
1
ωC
<< RL, RL = 600
R
T
=
120
k,
R
RX
=
60
k

4페이지










PBL386302QNS 전자부품, 판매, 대치품
PBL 386 30/2
Notes
1. The overload level can be adjusted with the ROV resistor
for higher levels e.g. min 3.1 VPeak and is specified at the
two-wire port with the signal source at the four-wire
receive port.
2. The two-wire impedance is programmable by selection of
external component values according to:
ZTRX = ZT/|G2-4S α RSN| where:
Z = impedance between the TIPX and RINGX
TRX
terminals
ZT = programming network between the VTX and RSN
terminals
G2-4S = transmit gain, nominally = 1 (or 0.5 see pin PTG)
α RSN = receive current gain, nominally = 200 (current
defined as positive flowing into the receivesumm-
ing node, RSN, and when flowing from ring to tip).
3. Higher return loss values can be achieved by adding a
reactive component to RT, the two-wire terminating
impedance programming resistance, e.g. by dividing RT
into two equal halves and connecting a capacitor from the
common point to ground.
4. The overload level level can be adjusted with the ROV
resistor for higher levels e.g. min 3.1 VPeak and is specified
at the four-wire transmit port, VTX, with the signal source
at the two-wire port. Note that the gain from the two-wire
port to the four-wire transmit port is G2-4S = 1 (or 0.5 see
pin PTG)
5. Pin PTG = Open sets transmit gain to nom. 0.0dB
Pin PTG = AGND sets transmit gain to nom. -6.02 dB
Secondary protection resistors RF impact the insertion loss
as explained in the text, section Transmission. The
specified insertion loss is for RF = RP = 0.
6. The specified insertion loss tolerance does not include
errors caused by external components.
7. The level is specified at the two-wire port.
8. The two-wire idle noise is specified with the port
terminated
in
600
(R )
L
and
with
the
four-wire
receive
port grounded (ERX = 0; see figure 6).
The four-wire idle noise at VTX is specified with the two-
wire
port
terminated
in
600
(R ).
L
The noise specification
is referenced to a 600 programmed two-wire impedance
level at VTX. The four-wire receive port is grounded
(ERX = 0).
7

7페이지


구       성 총 16 페이지수
다운로드[ PBL386302QNS.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
PBL386302QNS

Subscriber Line Interface Circuit

Ericsson
Ericsson
PBL386302QNT

Subscriber Line Interface Circuit

Ericsson
Ericsson

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵