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PBL40309 데이터시트 PDF




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부품번호 PBL40309 기능
기능 3.6 V Differential Power Amplifier for DECT Telecommunications system
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PBL40309 데이터시트, 핀배열, 회로
Preliminary
PABuLgu4s0t 3200090
PBL 403 09
3.6 V Differential Power Amplifier
for DECT Telecommunications system
Description.
Key features.
The PBL 403 09 is a differential two stage silicon MMIC power amplifier intended for • 27 dBm output power
use in handheld cordless terminals in the 1900 MHz band. It can deliver more than 27
dBm at 1900 MHz into a balanced 50 load using a single 3.6 V supply. The circuit has • 25 dB small signal gain
a logic input to control transmit on/off and can be operated up to 100 % duty cycle with
minimum performance degradation. The circuit is housed in a specially designed • 50 % Power Added Efficiency
QSOP16 (150 mil body ) package and the implementation requires only few external
components.
• Simple logic on/off power control
25 GHz ft state-of-the-art deep trench isolated double-poly silicon bipolar process
with additional features for improved wireless performance has been used. On-chip • Battery charging conditions to 5.0 V
capacitors and inductors are used for the integrated internal matching network. Special
front-side metallized substrate contacts provide excellent ground paths from active • ESD protected
devices to the highly doped semiconductor substrate and package ground.
• Excellent ruggedness
• On-chip input and interstage
matching
• Differential input matched to 50
V CC
• Easy implementation with a simple
output matching network
RF In A
RF Out A & VCC
• Proven RF Silicon Technology
Reliability
• Low overall solution cost
Applications.
RF In B
RF Out B & VCC
• DECT
PoPwAe-rOCNontrol
Figure 1. Block diagram.
Figure 2. Package outlook.
1




PBL40309 pdf, 반도체, 판매, 대치품
PBL 403 09
Application information.
DECT SINGLE ENDED POWER AMPLIFIER
When used as a single ended power amplifier, please refer to fig.7 and the test board fig. 8.
The 50 source impedance is converted to 50 differential with an LC-CL structure. Two series capacitors AC-couples the signal
to the input of PBL403 09. Suitable value of the capacitors is 1 to 5 pF in order to compensate for series inductance of the PCB and
package. Input impedance of the PBL403 09 is 50 differential.
The ideal collector load of the open collector RF output of PBL403 09 is about 11 per side. A matching and combination network to
50 single ended case is shown in fig. 7. A shunt capacitor (2.7 pF) transforms each output to 50 . Both 50 outputs are AC coupled
and then combined with an LC-CL structure to a 50 single ended output.
PA-ON
Vcc
10n
100p
100p
input
1.5p
3.9n 1.5p
1.5p 1.5p
3.9n
PBL 403 09
68 68
nn
33p
33p
2.7p 2.7p
GND
Figure 7. Evaluation setup including networks for unbalanced input/output.
1.1p
5.6n
1.1p
5.6n
output
Figure 8. Evaluation testboard.
4

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